Semiconductor device
AssigneeRenesas Electronics Corporation
InventorKosuke Yayama
Life of this patent
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Abstract
A technique capable of detecting a substrate bias voltage at a low power consumption is provided. The technique including: a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency; a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency; and a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria is provided.
Claims5
A semiconductor device comprising:
- a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency;
- a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency;
- a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria;
- a first oscillating circuit outputting the first clock signal having the first frequency;
- and
- a second oscillating circuit outputting the second clock signal having the second frequency.
A semiconductor device comprising:
- a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency;
- a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency;
- a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria;
- a first oscillating circuit outputting the first clock signal having the first frequency;
- and
- a first gating circuit gating the first clock signal having the first frequency and outputting the second clock signal having the second frequency.
A semiconductor device comprising:
- a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency;
- a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency;
- a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria;
- a first oscillating circuit;
- a first gating circuit gating an output of the first oscillating circuit and outputting the first clock signal having the first frequency;
- and
- a second gating circuit gating the output of the first oscillating circuit and outputting the second clock signal having the second frequency.
Dependencies are inferred from the claim text.