Power amplifiers testing system and related testing method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsieh-Hung Hsieh, Wu-Chen Lin, Yen-Jen Chen, Tzu-Jin Yeh
Life of this patent
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Abstract
A testing system includes: a dividing circuit configured to receive a testing signal and provide a plurality of input signals according to the testing signal; and a plurality of integrated power-amplifiers coupled to the dividing circuit, each of the plurality of integrated power-amplifiers being configured to be tested by receiving a respective input signal of the plurality of input signals and generating a respective output signal for a predetermined testing time.
Claims20
A circuit, comprising:
- a dividing circuit configured to receive a testing signal and provide a plurality of input signals according to the testing signal;
- and
- a plurality of integrated power-amplifiers coupled to the dividing circuit, each of the plurality of integrated power-amplifiers being configured to be tested by receiving a respective input signal of the plurality of input signals and generating a respective output signal for a predetermined testing time.
A power amplifier, comprising:
- a first circuit comprising a first inductor and a second inductor magnetically coupled to the first inductor;
- a plurality of slicing cascoded stages coupled to the second inductor of the first circuit;
- a second circuit comprising:
- a first inductor coupled to the plurality of slicing cascoded stages, and a second inductor magnetically coupled to the first inductor,
- wherein the plurality of slicing cascoded stages are connected in parallel.
A method for simultaneously testing a plurality of power-amplifiers, each of the plurality of power-amplifiers comprising a first transistor and a second transistor, each of the first transistor and the second transistor comprising a first source/drain terminal and a second source/drain terminal, wherein the second source/drain terminal of the first transistor is connected to the first source/drain terminal of the second transistor, the method comprising:
- turning on the first transistor and turning off the second transistor;
- making a measurement for the first transistor;
- turning on the second transistor and turning off the first transistor;
- and
- making a measurement for the second transistor.
Dependencies are inferred from the claim text.