Check node data compression in memory systems
AssigneeSK Hynix NAND Product Solutions Corp.
InventorZion Kwok
Life of this patent
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Abstract
This application is directed to compressing check node data for an electronic device. The electronic device identifies a check node corresponding to a subset of codeword symbols in a block of data and determines check node data that indicates a likelihood of the subset of codeword symbols being erroneous. A set of data bits are determined based on a value combination of data items of the check node data to uniquely identify the value combination among a set of selected value combinations according to a predefined relationship. The electronic device stores, in a memory block, the set of data bits representing the data items of the check node data of the check node. Each data item requires more data bits to represent all possible values of the respective data item than data bits of the set of data bits.
Claims20
A method implemented at an electronic device for compressing check node data, the method comprising:
- identifying a plurality of check nodes associated with a block of data, each check node corresponding to a subset of codeword symbols in the block of data and having respective check node data that indicate a likelihood of the subset of codeword symbols being erroneous;
- for each of a subset of check nodes, identifying a set of most significant bits (MSBs) of one or more data items in the respective check node data;
- determining a set of data bits based on a plurality of MSB sets of the subset of check nodes, the plurality of MSB sets including the set of MSBs of the one or more data items in the respective check node data of each of the subset of check nodes;
- and
- storing, in a memory block allocated to the plurality of check nodes, the set of data bits in association with the subset of check nodes;
- wherein the plurality of MSB sets has a first number of data bits in total, and the set of data bits has a second number of data bits, the second number being smaller than the first number.
An electronic device, comprising:
- one or more processors;
- and
- memory storing one or more programs configured for execution by the one or more processors, the one or more programs comprising instructions for:
- identifying a plurality of check nodes associated with a block of data, each check node corresponding to a subset of codeword symbols in the block of data and having respective check node data that indicate a likelihood of the subset of codeword symbols being erroneous;
- for each of a subset of check nodes, identifying a set of most significant bits (MSBs) of one or more data items in the respective check node data;
- determining a set of data bits based on a plurality of MSB sets of the subset of check nodes, the plurality of MSB sets including the set of MSBs of the one or more data items in the respective check node data of each of the subset of check nodes;
- and
- storing, in a memory block allocated to the plurality of check nodes, the set of data bits in association with the subset of check nodes;
- wherein the plurality of MSB sets has a first number of data bits in total, and the set of data bits has a second number of data bits, the second number being smaller than the first number.
A non-transitory computer-readable storage medium storing one or more programs to be executed by one or more processors for compressing check node data, the one or more programs comprising instructions for:
- identifying a plurality of check nodes associated with a block of data, each check node corresponding to a subset of codeword symbols in the block of data and having respective check node data that indicate a likelihood of the subset of codeword symbols being erroneous;
- for each of a subset of check nodes, identifying a set of most significant bits (MSBs) of one or more data items in the respective check node data;
- determining a set of data bits based on a plurality of MSB sets of the subset of check nodes, the plurality of MSB sets including the set of MSBs of the one or more data items in the respective check node data of each of the subset of check nodes;
- and
- storing, in a memory block allocated to the plurality of check nodes, the set of data bits in association with the subset of check nodes;
- wherein each of the plurality of MSB sets has a first number of data bits in total, and the set of data bits has a second number of data bits, the second number being smaller than the first number.
Dependencies are inferred from the claim text.