Ultra low latency pattern matching system and method

A data processing method, comprising:

• transmitting and receiving, by a data communication port, data to and from at least one computing device;
• replicating, by a replicator, ingress data received from the data communication port to a pattern matcher, wherein the pattern matcher is configured by pattern information received from a field programmable gate array,
• generating, by the pattern matcher, a trigger signal that is associated with any of the replicated data received from the replicator that match the pattern information;
• transmitting, by the pattern matcher, the trigger signal to the field programmable gate array;
• receiving, by the field programmable gate array, the replicated data from the replicator and the trigger signal from the pattern matcher;
• and
• performing, by the field programmable gate array, bit operations on at least some of the replicated data received from the replicator as a function of the received trigger signal received from the pattern matcher.