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US 12,300,689 B2Granted
Dual cool power module with stress buffer layer
AssigneeSemiconductor Components Industries, LLC
InventorsJonghwan Baek, JeongHyuk Park, Seungwon Im, Keunhyuk Lee
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Abstract
Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.
Claims18
A semiconductor device package, comprising:
- a leadframe;
- a first pin-fin heatsink disposed on the leadframe;
- a first semiconductor die flip-attached to a patterned metal layer of a direct bonded metal (DBM) disposed on the leadframe;
- a second semiconductor die disposed on the patterned metal layer of the DBM;
- a clip electrically connected to the first semiconductor die and the second semiconductor die and connecting the first semiconductor die, the clip, and the second semiconductor die in series;
- an electrically-isolating layer disposed on the clip;
- a second pin-fin heatsink disposed on the clip with the electrically-isolating layer disposed therebetween;
- and
- a mold material encapsulating the first semiconductor die, the second semiconductor die, the clip, and the electrically-isolating layer, and partially encapsulating the leadframe, the first pin-fin heatsink, and the second pin-fin heatsink.
6 more elements
A semiconductor device package, comprising:
- a leadframe;
- a substrate connected to the leadframe;
- a first pin-fin heatsink connected to the substrate;
- a first semiconductor die disposed on a patterned metal layer of the substrate;
- a second semiconductor die disposed on the patterned metal layer of the substrate;
- a clip electrically connected to the first semiconductor die and the second semiconductor die;
- an electrically-isolating layer disposed on the clip;
- a second pin-fin heatsink disposed on the clip with the electrically-isolating layer disposed therebetween;
- and
- a mold material encapsulating the first semiconductor die, the second semiconductor die, the clip, and the electrically-isolating layer, and partially encapsulating the leadframe, the first pin-fin heatsink, and the second pin-fin heatsink,
- wherein the first semiconductor die is flip-attached to the patterned metal layer of the substrate, and the first semiconductor die, the clip, and the second semiconductor die are connected in series.
8 more elements
A semiconductor device package, comprising:
- a leadframe;
- a substrate connected to the leadframe;
- a first pin-fin heatsink connected to the leadframe;
- a first semiconductor die disposed on a patterned metal layer of the substrate;
- a second semiconductor die disposed on the patterned metal layer of the substrate;
- a clip electrically connected to the first semiconductor die and the second semiconductor die;
- an electrically-isolating layer disposed on the clip;
- and
- a second pin-fin heatsink disposed on the clip with the electrically-isolating layer disposed therebetween,
- wherein the first semiconductor die is flip-attached to the patterned metal layer of the substrate, and the first semiconductor die, the clip, and the second semiconductor die are connected in series.
7 more elements
Dependencies are inferred from the claim text.