Highly linear multiplier

A multiplier (1A, 1B, 1C) configured to produce an output current representing a product of a first input voltage and a second input voltage, comprising:

• a first transconductance stage which is configured to input the first input voltage and to output a first pair of differential currents, when being supplied with a first fixed bias current, wherein the first transconductance stage comprises a negative feedback network,
• at least one second transconductance stage which is configured to input the second input voltage and to output a pre-distorted voltage of the second input voltage, when being supplied with a second fixed bias current, wherein each second transconductance stage comprises a negative feedback network,
• a pair of third transconductance stages, each of which is configured to input a voltage corresponding to the pre-distorted voltage of the second input voltage and to output a second pair of differential currents, when being supplied with a bias current corresponding to a respective current of the first pair of differential currents, and
• a combination network which is configured to generate the output current by combining the second pairs of differential currents from both of the pair of third transconductance stages, wherein
• the first transconductance stage comprises two current outputs for each of the first pair of differential currents,
• the first transconductance stage is configured such that, for each of the first pair of differential currents, one of the two current outputs is subtracted from a first reference current corresponding to an output current at an operating point of the first transconductance stage and the resulting current difference is fed back via a feedback resistor to an input side of the first transconductance stage, and the other one of the two current outputs is output from the first transconductance stage,
• each second transconductance stage is configured such that, for each of a pair of currents at an output side of the second transconductance stage, the current is subtracted from a second reference current corresponding to an output current at an operating point of the second transconductance stage and the resulting current difference is fed back via a feedback resistor on a feedback path to an input side of the second transconductance stage, and
• each second transconductance stage is configured to output, as the pre-distorted voltage, a potential difference between the two feedback paths.

A multiplier (1A, 1B, 1C) configured to produce an output current representing a product of a first input voltage and a second input voltage, comprising:

• a first transconductance stage which is configured to input the first input voltage and to output a first pair of differential currents, when being supplied with a first fixed bias current, wherein the first transconductance stage comprises a negative feedback network,
• at least one second transconductance stage which is configured to input the second input voltage and to output a pre-distorted voltage of the second input voltage, when being supplied with a second fixed bias current, wherein each second transconductance stage comprises a negative feedback network,
• a pair of third transconductance stages, each of which is configured to input a voltage corresponding to the pre-distorted voltage of the second input voltage and to output a second pair of differential currents, when being supplied with a bias current corresponding to a respective current of the first pair of differential currents, and
• a combination network which is configured to generate the output current by combining the second pairs of differential currents from both of the pair of third transconductance stages,
• wherein each transconductance stage is realized with MOSFET transistors in CMOS technology.