Secured scan access for a device including a scan chain
AssigneeTexas Instruments Incorporated
InventorsMudasir Kawoosa, Pervez Garg, Prateek Giri
Life of this patent
Estimating the term…
Abstract
A device includes a scan chain including a plurality of storage elements and an output buffer; a shadow shift register having a shadow shift input coupled to a scan output of one of the storage elements of the scan chain; a signature register; and a comparator having a first input, a second input, and an output. The comparator first input is to receive a value of the shadow shift register, and the comparator second input is to receive a value of the signature register. The output buffer has a control input coupled to the comparator output, and the output buffer provides a high-impedance output responsive to the value of the shadow shift register being unequal to the value of the signature register.
Claims20
A device comprising:
- a scan chain having a plurality of scan cells, a first input, and a first output;
- an output buffer having a first input coupled to the first output of the scan chain, and an enable input;
- a first shift register having an input coupled to a second output of the scan chain;
- a second register;
- and
- a comparator having a first input coupled to the first shift register, a second input coupled to the second register, and an output coupled to the enable input of the output buffer.
A method comprising:
- receiving a scan input signal at a first input of a scan chain, the scan chain having a first output coupled to an input of an output buffer;
- during a scan-in phase,
- shifting values of the scan input signal into the scan chain, and
- shifting values into a first shift register having an input coupled to a second output of the scan chain;
- during a capture phase occurring after the scan-in phase, latching content of the first shift register into a first latch;
- and
- during a scan-out phase occurring after the capture phase, in response to content of the first latch matching content of a second register, enabling the output buffer to generate, at an output of the output buffer, a scan out signal based on the first output of the scan chain.
Dependencies are inferred from the claim text.