Signal processing board and image forming apparatus
AssigneeKYOCERA Document Solutions Inc.
InventorShotaro Ikegami
Life of this patent
Estimating the term…
Abstract
A signal processing board includes a six-layer substrate. A plurality of signal transmission planes are formed in a first layer, a third layer, a fourth layer, and a sixth layer. A first ground plane is formed in a second layer. A first power supply plane is formed in a fifth layer and electrically connected to the first semiconductor element. A second power supply plane is formed in the fifth layer and electrically connected to the second semiconductor element. A second ground plane is formed in the fifth layer. A first bypass capacitor is electrically connected to the first power supply plane and the second ground plane. A second bypass capacitor is electrically connected to the second power supply plane and the second ground plane.
Claims5
A signal processing board comprising:
- a six-layer substrate in which six wiring layers are stacked;
- a first semiconductor element and a second semiconductor element arranged on an outer surface of a first layer of the six wiring layers;
- a plurality of signal transmission planes formed in the first layer, a third layer, a fourth layer, and a sixth layer of the six wiring layers and electrically connected to one or both of the first semiconductor element and the second semiconductor element;
- a first ground plane formed in a second layer of the six wiring layers and electrically connected to the first semiconductor element and the second semiconductor element;
- a first power supply plane formed in a fifth layer of the six wiring layers and electrically connected to the first semiconductor element;
- a second power supply plane formed in the fifth layer of the six wiring layers and electrically connected to the second semiconductor element;
- a second ground plane formed in the fifth layer of the six wiring layers and electrically connected to the first semiconductor element and the second semiconductor element;
- a first bypass capacitor arranged on an outer surface of the first layer or the sixth layer and electrically connected to the first power supply plane and the second ground plane;
- and
- a second bypass capacitor arranged on an outer surface of the first layer or the sixth layer and electrically connected to the second power supply plane and the second ground plane.
Dependencies are inferred from the claim text.