Gate-all-around integrated circuit structures having insulator substrate

A method of fabricating an integrated circuit structure, the method comprising:

• forming a vertical arrangement of horizontal nanowires above a semiconductor fin above a semiconductor substrate;
• forming a gate stack surrounding a channel region of the vertical arrangement of horizontal nanowires, the gate stack overlying a channel region of the semiconductor fin;
• forming a pair of epitaxial source or drain structures at first and second ends of the vertical arrangement of horizontal nanowires and the semiconductor fin, wherein one or both of the pair of epitaxial source or drain structures is vertically overlapping with a top surface of an uppermost one of the vertical arrangement of horizontal nanowires and is in direct physical contact with the top surface of the uppermost one of the vertical arrangement of horizontal nanowires;
• removing the semiconductor substrate to expose a bottom of the semiconductor fin and a bottom of the epitaxial source or drain structures;
• and
• bonding an insulator substrate to the bottom of the semiconductor fin and to the bottom of the epitaxial source or drain structures.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a semiconductor fin on and in direct physical contact with an insulator substrate;
• a vertical arrangement of horizontal nanowires over the semiconductor fin;
• a gate stack surrounding a channel region of the vertical arrangement of horizontal nanowires, the gate stack overlying a channel region of the semiconductor fin, and the gate stack comprising a gate electrode vertically between a bottommost one of the vertical arrangement of horizontal nanowires and a top of the semiconductor fin;
• and
• a pair of epitaxial source or drain structures at first and second ends of the vertical
• arrangement of horizontal nanowires and the semiconductor fin, wherein one or both of the pair of epitaxial source or drain structures is vertically overlapping with a top surface of an uppermost one of the vertical arrangement of horizontal nanowires and is in direct physical contact with the top surface of the uppermost one of the vertical arrangement of horizontal nanowires.