Low-power systematic ECC encoder with balancing bits

A device for encoding information bits for storage in a storage device, the device comprising:

• a memory interface configured to communicate with the storage device;
• and
• at least one processor configured to:
• obtain the information bits and a target constraints vector;
• obtain a preliminary constraints vector by applying a constraints transform to the information bits;
• apply a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to obtain balance bits;
• obtain an output codeword based on the information bits and the balance bits;
• and
• control the memory interface to transmit the output codeword to the storage device.

A method of controlling a storage system, the method being executed by at least one processor and comprising:

• obtaining information bits and a target constraints vector;
• placing the information bits in an input vector;
• setting balance bits included in the input vector to zero;
• encoding the input vector using a systematic code to obtain a preliminary codeword;
• applying a constraints matrix to the preliminary codeword to obtain a preliminary constraints vector;
• applying a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to determine updated balance bits;
• obtaining an output codeword based on the information bits and the updated balance bits;
• and
• storing the output codeword in a storage device.