Fault-tolerant computer system with configurable coprocessor component and methods thereof

A computer system, comprising:

• a plurality of processor cores configured to simultaneously execute identical sets of processor-executable instructions;
• and
• a coprocessor component comprising:
• a data storage component;
• and
• a configurable logic region, wherein the plurality of processor cores are configured with processor-executable instructions to perform operations comprising:
• configuring the configurable logic region of the coprocessor component with a first coprocessing module;
• and
• controlling the first coprocessing module to perform first processing operations on data located in the data storage component;
• wherein each of the processor cores comprises a central processing unit (CPU) and a local memory;
• and
• wherein data is input into the data storage component of the coprocessor component without being stored within the local memory of any of the processor cores.

A computer system, comprising:

• a plurality of processor cores configured to simultaneously execute identical sets of processor-executable instructions;
• and
• a coprocessor component comprising:
• a data storage component;
• and
• a configurable logic region, wherein the plurality of processor cores are configured with processor-executable instructions to perform operations comprising:
• configuring the configurable logic region of a coprocessor component with a first coprocessing module;
• and
• controlling the first coprocessing module to perform first processing operations on data located in the data storage component;
• wherein each of the processor cores comprises a central processing unit (CPU) and a local memory;
• and
• wherein a coprocessor core is memory mapped as a peripheral of the plurality of processor cores.

A computer system, comprising:

• a plurality of processor cores configured to simultaneously execute identical sets of processor-executable instructions;
• and
• a coprocessor component comprising:
• a data storage component;
• and
• a configurable logic region, wherein the plurality of processor cores are configured with processor-executable instructions to perform operations comprising:
• configuring the configurable logic region of the coprocessor component with a first coprocessing module;
• and
• controlling the first coprocessing module to perform first processing operations on data located in the data storage component;
• wherein each of the processor cores comprises a central processing unit (CPU) and a local memory;
• and
• wherein the computer system comprises at least four redundant processor cores, and the computer system further comprises:
• a voting and repair component configured to monitor register values of each of the redundant processor cores and to overwrite faulty register values with a majority register value.