Memory device with status feedback for error correction

A memory device, comprising:

• an array of memory cells;
• and
• a controller coupled with the array of memory cells and operable to cause the memory device to:
• read, by the memory device, first data from the array of memory cells during a read operation;
• perform, by the memory device, an error correction operation on the first data to obtain second data and an indicator of a state of error in the second data;
• output, via a first channel during a burst interval, the second data resulting from the error correction operation;
• and
• output, via a second channel during the burst interval, the indicator of the state of error in the second data, wherein the state of error comprises one of at least three states of error.

A method, comprising:

• transmitting, by a host device, a read command associated with reading first data from a memory array of a memory device;
• receiving, from the memory device via a first channel during a burst interval, second data associated with an error correction operation performed on the first data;
• and
• receiving, from the memory device via a second channel during the burst interval, an indicator of a state of error in the second data, wherein the state of error comprises one of at least three states of error.