Semiconductor devices and methods of manufacturing semiconductor devices

A semiconductor device, comprising:

• a region of semiconductor material comprising:
• a top side;
• a bottom side opposite to the top side;
• a semiconductor substrate characterized by a first conductivity type and a semiconductor substrate thickness;
• and
• a semiconductor region over the semiconductor substrate and characterized by the first conductivity type and a higher peak dopant concentration than the semiconductor substrate;
• a well region in the semiconductor region and characterized by a second conductivity type opposite to the first conductivity type;
• a first doped region in the well region and characterized by the first conductivity type;
• a second doped region in the well region laterally adjacent to the first doped region and characterized by the second conductivity type;
• a third doped region in the semiconductor substrate at the bottom side and characterized by the second conductivity type;
• a fourth doped region in the semiconductor substrate at the bottom side laterally adjacent to the third doped region and characterized by the first conductivity type;
• an anode terminal coupled to the first doped region and the second doped region at the top side;
• and
• a cathode terminal coupled to the third doped region and the fourth doped region at the bottom side;
• wherein:
• the semiconductor device comprises a device width in a cross-sectional view;
• the third doped region comprises a first width in the cross-sectional view;
• the fourth doped region comprises a second width in the cross-sectional view;
• and
• the first width is between 40% and 60% of the device width.

A method of manufacturing a semiconductor device, comprising:

• providing a region of semiconductor material comprising:
• a top side;
• a bottom side opposite to the top side;
• a semiconductor substrate characterized by a first conductivity type and a semiconductor substrate thickness;
• and
• a semiconductor region over the semiconductor substrate and characterized by the first conductivity type and a higher peak dopant concentration than the semiconductor substrate;
• providing a well region in the semiconductor region and characterized by a second conductivity type opposite to the first conductivity type;
• providing a first doped region in the well region and characterized by the first conductivity type;
• providing a second doped region in the well region laterally adjacent to the first doped region and characterized by the second conductivity type;
• providing a third doped region in the semiconductor substrate at the bottom side and characterized by the second conductivity type;
• providing a fourth doped region in the semiconductor substrate at the bottom side laterally adjacent to the third doped region and characterized by the first conductivity type;
• providing an anode terminal coupled to the first doped region and the second doped region at the top side;
• and
• providing a cathode terminal coupled to the third doped region and the fourth doped region at the bottom side;
• wherein:
• the semiconductor device comprises a device width in a cross-sectional view;
• the third doped region comprises a first width in the cross-sectional view;
• the fourth doped region comprises a second width in the cross-sectional view;
• and
• the first width is between 40% and 60% of the device width.