High-threshold-voltage normally-off high-electron-mobility transistor and preparation method therefor

A high-threshold-voltage normally-off high-electron-mobility transistor, comprising:

• a substrate, a nucleation layer, an epitaxial layer, a barrier layer, a passivation layer, a gate cap layer, a composite gate dielectric insertion layer, a gate, a source, and a drain, wherein the nucleation layer and the epitaxial layer are sequentially grown on the substrate,
• the barrier layer, the source, and the drain are located above the epitaxial layer,
• the barrier layer and the epitaxial layer comprise a heterojunction structure, and a contact interface therebetween is induced by polarization charges to generate two-dimensional electron gas, the passivation layer is above the barrier layer,
• the gate cap layer is above a gate region of the barrier layer, the composite gate dielectric insertion layer is directly above the gate cap layer,
• the gate is located above the composite gate dielectric insertion layer, the gate is in contact with the passivation layer, and the gate covers and physically contacts (i) an entirety of a top surface and side walls of the composite gate dielectric insertion layer and (ii) a portion of side walls of the gate cap layer;
• and
• a field plate extends from the gate towards the drain on the passivation layer.