RF power amplifier with compensated current and gain from turn-on to end of long burst

A radio frequency (RF) power amplifier architecture and circuits for adjusting power amplifier output gain during a signal burst interval comprising:

• an RF Cascode amplifier comprising a common gate stage transistor and a common source RF amplifying transistor for providing RF gain to an RF output current flowing between a voltage supply that is coupled to the common gate stage transistor output terminal through the common source RF amplifying transistor to ground;
• a first circuit comprising a current mirror circuit providing a bias voltage at a first terminal which is coupled through a resistor to the input terminal of the common source amplifying transistor;
• and
• a second circuit connected to the current mirror circuit at the first terminal providing a signal to modify the bias voltage on the common source RF amplifying transistor of the RF Cascode amplifier following a turn-on portion of the signal burst interval, wherein the second circuit comprises a resistor-capacitor network, and wherein a capacitor is a capacitor that is connected to the external pins of the package of the integrated circuit, and wherein the second circuit causes common source RF amplifying transistor output gain to slowly rise to a design target over a time interval characterized by a time constant, wherein the electrical time constant of the resistor-capacitor network matches a thermal time constant of the common source RF amplifying transistor, and wherein the combined first and second circuits reduce common source RF amplifying transistor output gain following the turn-on portion on the signal burst interval by increasing the bias voltage on the common source RF amplifying transistor to compensate for a decrease in the common source RF amplifying transistor gain due to thermal self-heating in the common source RF amplifying transistor following the turn-on portion of the signal burst interval and thereby provide uniform gain throughout the signal burst interval.

A radio frequency (RF) power amplifier architecture and circuits for adjusting power amplifier output gain during a signal burst interval, comprising:

• an amplifier transistor controlling and providing gain to an output current flowing between a voltage supply coupled to the amplifier transistor's output terminal and ground;
• and
• a first circuit comprising a current mirror circuit providing a bias voltage at a first terminal which is coupled through a resistor to an input terminal of the amplifier transistor;
• and
• a second circuit, comprising a resistor-capacitor network, connected between the current mirror circuit at the first terminal and ground providing a signal to modify the bias voltage following a turn-on portion of the signal burst interval;
• and
• a third circuit, comprising a switch to ground, to turn off the amplifier transistor at the end of the burst signal interval by providing a discharge capability to the resistor-capacitor network, wherein the combined first and second circuits reduce amplifier transistor gain following the turn-on portion of the signal burst interval to compensate for decrease in amplifier transistor gain due to thermal self-heating in the amplifier transistor following the turn-on portion of the signal burst and thereby provide uniform gain and uniform Error Vector Magnitude of a digital modulation throughout the signal burst interval.