Interconnect structure for insertion loss reduction in signal transmission and method thereof
AssigneeYuan Ze University
InventorsCheng En Ho, Shun Cheng Chang, Jun Chou Yu, Cheng Yu Lee, Chien Chang Huang
Life of this patent
Estimating the term…
Loading patent…
AssigneeYuan Ze University
InventorsCheng En Ho, Shun Cheng Chang, Jun Chou Yu, Cheng Yu Lee, Chien Chang Huang
Estimating the term…
An interconnect structure for insertion loss reduction in signal transmission and a method thereof are disclosed. In an embodiment, an interconnect is formed on a substrate by chemical etching process, and when the interconnect is protected by photoresist in chemical etching process, the etching direction of etching solution is not oriented, so undercut areas are respectively formed on both sides of a bottom of the interconnect at contact of the interconnect and the substrate because of etching solution residue after the etching process. An included angle formed in the undercut area between the interconnect and the substrate is defined as an etch angle, and a length of the portion, exposing in the undercut area, of the substrate is defined as an etch length. Controlling sizes of the etch angle and the etch length can reduce an insertion loss in signal transmission.
A high-speed electroplating method, comprising:
A method of forming interconnect structure for insertion loss reduction in signal transmission, and the method comprising:
Dependencies are inferred from the claim text.