Receiver with feed forward equalization

A method comprising:

• receiving, at a delay circuit having a T-coil circuit, a first signal that encodes a serial data stream that includes a plurality of data symbols;
• generating, using the delay circuit and based on the first signal, a first delayed signal generated at a center-tap junction of the T-coil circuit and a second delayed signal generated at an output junction of the T-coil circuit;
• receiving, using an analog front-end circuit comprising a continuous time linear equalizer (CTLE), the first signal, the first delayed signal, and the second delayed signal, wherein the first signal is received without a delay being applied;
• and
• generating, using the analog front-end circuit, an equalized signal based on the first signal, wherein, generating the equalized signal includes applying the first signal to the front-end circuit without applying a delay, and wherein generating the equalization signal includes generating one or more cancellation signals to cancel a precursor present in the first signal and further configured to cancel a postcursor present in the first signal;
• generating a plurality of samples by sampling the equalized signal;
• and
• generating, using a recovery circuit, a plurality of recovered data symbols from the plurality of samples.

A circuit comprising:

• a plurality of serially-coupled T-coil circuits including a first T-coil circuit, wherein the first T-coil circuit is coupled to receive an incoming signal having a plurality of symbols, and wherein ones of the plurality of serially-coupled T-coil circuits are configured to generate respective ones of a plurality of delayed signals using the incoming signal;
• a front-end circuit, wherein the front-end circuit is an analog circuit comprising a continuous time linear equalizer (CTLE) and is coupled to a plurality of taps of the plurality of serially-coupled T-coil circuits, wherein the front-end circuit is configured to generate an equalized signal using the incoming signal and ones of the plurality of delayed signals, wherein the incoming signal is provided to the front-end circuit without applying a delay, and wherein, to generate the equalized signal, the front-end circuit is configured to generate one or more cancellation signals to cancel a precursor present in the incoming signal and further configured to cancel a postcursor present in the incoming signal;
• a sample circuit configured to a generate a plurality of samples using the equalized signal;
• and
• a recovery circuit configured to generate a plurality of recovered data symbols based on the plurality of samples.