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US 12,274,090 B2Granted
Semiconductor integrated circuit device
AssigneeSocionext Inc.
InventorsMasahisa Iida, Toshihiro Nakamura
Life of this patent
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Abstract
An IO cell includes a first output transistor and a second output transistor. A capacitance transistor is provided between external connection pads. The capacitance transistor is placed between the output transistors and an edge of the semiconductor integrated circuit device as viewed in plan. The gate length of the capacitance transistor is smaller than the gate length of the output transistors.
Claims16
A semiconductor integrated circuit device, comprising:
- a core region in which an internal circuit is formed;
- and
- an IO region located between the core region and an edge of the semiconductor integrated circuit device, the IO region including a plurality of IO cells,
- wherein
- one of the IO cells includes
- a first output transistor of a first conductivity type connected to a first external connection pad receiving a first power supply voltage at one end and connected to an output node at the other end, and
- a second output transistor of a second conductivity type connected to a second external connection pad receiving a second power supply voltage different from the first power supply voltage at one end and connected to the output node at the other end,
- a capacitance transistor is provided between the first and second external connection pads,
- the capacitance transistor is placed between the first and second output transistors and the edge of the semiconductor integrated circuit device as viewed in plan, and
- a gate length of the capacitance transistor is smaller than gate lengths of the first and second output transistors.
7 more elements
A semiconductor integrated circuit device, comprising:
- a core region in which an internal circuit is formed;
- and
- an IO region located between the core region and an edge of the semiconductor integrated circuit device, the IO region including first and second IO cells,
- wherein
- the first IO cell includes
- a first output transistor of a first conductivity type connected to a first external connection pad receiving a first power supply voltage at one end and connected to a first output node at the other end, and
- a second output transistor of a second conductivity type connected to a second external connection pad receiving a second power supply voltage different from the first power supply voltage at one end and connected to the first output node at the other end,
- a first capacitance transistor is provided between the first and second external connection pads,
- the first capacitance transistor is placed between the first and second IO cells, and
- a gate length of the first capacitance transistor is smaller than a gate length of the first and second output transistors.
7 more elements
Dependencies are inferred from the claim text.