Variable resistance memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsHyuncheol Kim, Yongseok Kim, Dongsoo Woo, Kyunghwan Lee
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Abstract
A variable resistance memory device including a stack including insulating sheets and conductive sheets, which are alternatingly stacked on a substrate, the stack including a vertical hole vertically penetrating therethrough, a bit line on the stack, a conductive pattern electrically connected to the bit line and vertically extending in the vertical hole, and a resistance varying layer between the conductive pattern and an inner side surface of the stack defining the vertical hole may be provided. The resistance varying layer may include a first carbon nanotube electrically connected to the conductive sheets, and a second carbon nanotube electrically connected to the conductive pattern.
Claims20
A variable resistance memory device, comprising:
- a stack including insulating sheets and conductive sheets, which are alternatingly stacked on a substrate, the stack including a vertical hole vertically penetrating therethrough;
- a bit line on the stack;
- a conductive pattern electrically connected to the bit line and vertically extending in the vertical hole;
- and
- a resistance varying layer between the conductive pattern and an inner side surface of the stack defining the vertical hole,
- wherein the resistance varying layer comprises a first carbon nanotube electrically connected to the conductive sheets, and a second carbon nanotube electrically connected to the conductive pattern.
A variable resistance memory device, comprising:
- a stack on a substrate and extended in a first direction, the stack comprising insulating sheets and conductive sheets alternately stacked, the stack including a vertical hole vertically penetrating therethrough;
- a conductive pattern in the vertical hole and extending vertically;
- and
- a resistance varying layer between the conductive pattern and an inner side surface of the stack defining the vertical hole and extending vertically,
- wherein the resistance varying layer comprises carbon nanotubes electrically connected to at least one of the conductive sheets and the conductive pattern, and
- a thickness of the resistance varying layer in the first direction increases as a distance to the substrate decreases.
A variable resistance memory device, comprising:
- a substrate including a cell array region and a connection region;
- a stack including insulating sheets and conductive sheets, which are alternatingly stacked on the substrate, the stack having pads arranged in a stepwise manner on the connection region;
- a vertical structure on the cell array region and vertically penetrating the stack, the vertical structure comprising a conductive pattern and a resistance varying layer, the conductive pattern extending vertically, and the resistance varying layer covering an outer side surface of the conductive pattern;
- and
- a lower insulating layer between a top surface of the substrate and a bottom surface of the stack, the lower insulating layer having a top surface being at a level higher than a bottom surface of the vertical structure,
- wherein a top surface of a lowermost insulating sheet of the insulating sheets has a surface roughness that is lower than the top surface of the lower insulating layer.
Dependencies are inferred from the claim text.