Differential amplifier, semiconductor device and offset cancellation method
AssigneeRenesas Electronics Corporation
InventorsKoichi Takeda, Takahiro Shimoi, Masaya Nakano, Hidenori Mitani, Yoshinobu Kaneda
Life of this patent
Estimating the term…
Loading patent…
AssigneeRenesas Electronics Corporation
InventorsKoichi Takeda, Takahiro Shimoi, Masaya Nakano, Hidenori Mitani, Yoshinobu Kaneda
Estimating the term…
Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier. The differential amplifier includes: a current source that is connected to a first power supply in which a suppliable current is a first current; an active element pair that is connected to the current source, and amplifies a signal input to an input terminal pair to output an output signal pair; a load element pair that is connected to a second power supply different in power supply voltage from the first power supply, the load element pair serving for outputting the output signal pair to an output terminal pair; and a capacitance element pair that is inserted between an external input terminal pair and the input terminal pair; a switching element pair that charges the capacitance element pair to generate a voltage, which is obtained by converting an offset voltage of the input terminal pair into an input voltage, in the capacitance element pair by short-circuiting corresponding terminals between the output terminal pair and the input terminal pair; and a current control circuit that controls a current suppliable by the current source to a second current larger than the first current at a time of performing the charge.
A differential amplifier comprising:
An offset cancellation method for cancelling an offset voltage of an input terminal pair of a differential amplifier,
Dependencies are inferred from the claim text.