Differential delta-sigma modulator for a hearing aid
AssigneeWidex A/S
InventorNiels Ole Knudsen
Life of this patent
Estimating the term…
Abstract
A differential delta-sigma-modulator has an integrator including a pair of single-ended amplifiers. A sample clock is driving a first switchable capacitor configuration and a second switchable capacitor configuration at a predetermined switching cycle. The first switchable capacitor configuration is adapted for sampling respective outputs from the pair of single-ended amplifiers on a pair of output sampling capacitors in the first part of the switching cycle. The second switchable capacitor configuration is adapted for charging a common mode capacitor with the average voltage of the voltage sampled by the pair of output sampling capacitors in the second part of the switching cycle. The voltage across the common mode capacitor represents the common mode voltage for the integrator.
Claims19
A differential delta-sigma-modulator having an integrator including a pair of single-ended amplifiers and comprising:
- a sample clock driving a first switchable capacitor configuration and a second switchable capacitor configuration at a predetermined switching cycle;
- wherein the first switchable capacitor configuration is adapted for sampling respective outputs from the pair of single-ended amplifiers on a pair of output sampling capacitors in a first part of the switching cycle;
- and
- wherein the second switchable capacitor configuration is adapted for charging a common mode capacitor with the average voltage of the voltage sampled by the pair of output sampling capacitors in a second part of the switching cycle, wherein the voltage across the common mode capacitor represents the common mode voltage for the integrator;
- wherein a comparator is adapted for comparing the output from the pair of single-ended amplifiers and outputting a logical level in accordance to the comparison;
- and
- wherein the first switchable capacitor configuration in the first part of the switching cycle is adapted for sampling an output signal from the comparator by means of a pair of common mode feedback capacitors;
- and the second switchable capacitor configuration, in the second part of the switching cycle, is adapted for connecting the pair of common mode feedback capacitors to respective inputs of the pair of single-ended amplifiers.
A method of operating a differential delta-sigma-modulator having an integrator including a pair of single-ended amplifiers and comprising:
- driving a first and a second switchable capacitor configuration at a predetermined switching cycle;
- sampling, in a first part of the switching cycle, respective outputs from the pair of single-ended amplifiers on a pair of output sampling capacitors;
- charging, in a second part of the switching cycle, the average voltage of the voltage sampled by the pair of output sampling capacitors on a common mode capacitor, wherein the voltage across the common mode capacitor represents the common mode voltage for the integrator;
- comparing the output from the pair of single-ended amplifiers and outputting a logical level in accordance to the comparison;
- and
- sampling an output signal from the comparator by means of a pair of common mode feedback capacitors in the first part of the switching cycle;
- and connecting the pair of common mode feedback capacitors to respective inputs of the pair of single-ended amplifiers in the second part of the switching cycle.
A differential delta-sigma-modulator having two differential input terminals and further comprising:
- an integrator including a pair of single-ended amplifiers;
- a first switchable capacitor configuration provided between the two differential input terminals and the input of the pair of single-ended amplifiers;
- a second switchable capacitor configuration provided between inputs and outputs of respective pair of single-ended amplifiers;
- and
- a sample clock for driving the first switchable capacitor configuration and the second switchable capacitor configuration at a predetermined switching cycle;
- a comparator comparing the output from the pair of single-ended amplifiers and outputting a logical level in accordance to the comparison
- wherein a pair of common mode feedback capacitors in a first part of the switching cycle samples an output signal from the comparator, and wherein the first switchable capacitor configuration in a second part of the switching cycle connects the pair of common mode feedback capacitors to respective inputs of the pair of single-ended amplifiers.
Dependencies are inferred from the claim text.