Adaptive integrated programmable device platform
AssigneeXilinx, Inc.
InventorsSagheer Ahmad, Jaideep Dastidar, Brian C. Gaide, Juan J. Noguera Serra, Ian A. Swarbrick
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Abstract
A System-on-Chip includes a data processing engine array. The data processing engine array includes a plurality of data processing engines organized in a grid. The plurality of data processing engines are partitioned into at least a first partition and a second partition. The first partition includes one or more first data processing engines of the plurality of data processing engines. The second partition includes one or more second data processing engines of the plurality of data processing engines. Each partition is configured to implement an application that executes independently of the other partition.
Claims19
A System-on-Chip, comprising:
- a data processing engine array comprising a plurality of data processing engines organized in a grid with each data processing engine including a stream switch, a core, and a memory module;
- wherein each data processing engine is capable of conveying data to a different data processing engine via a first data path using the stream switch and via at least a second data path independent of the first data path in which the core accesses a memory module of an adjacent data processing engine via a memory interface, wherein the second data path circumvents the stream switch;
- wherein the plurality of data processing engines are partitioned into at least a first partition and a second partition;
- wherein the first partition includes one or more first data processing engines of the plurality of data processing engines;
- wherein the second partition includes one or more second data processing engines of the plurality of data processing engines;
- and
- wherein each partition is configured to implement an application that executes independently of the other partition.
A System-on-Chip, comprising:
- a data processing engine array comprising a plurality of data processing engines organized in a grid, wherein the plurality of data processing engines are partitioned into at least a first partition including one or more first data processing engines of the plurality of data processing engines and a second partition including one or more second data processing engines of the plurality of data processing engines;
- wherein each partition is configured to implement an application that executes independently of the other partition;
- and
- a network-on-chip coupled to the data processing engine array, wherein the network-on-chip is programmable to establish user specified data paths communicatively linking the first partition and the second partition with one or more other systems of the System-on-Chip.
Dependencies are inferred from the claim text.