Back to results
US 12,255,654 B2Granted
Slew rate acceleration circuit and buffer circuit including the same
AssigneeMagnachip Mixed-Signal, Ltd.
InventorsDukmin Lee, Kyeongwoo Kim
Life of this patent
Estimating the term…
Abstract
A slew rate acceleration circuit in a buffer circuit, is configured at least to detect a current flowing through a load stage of the buffer circuit, compare a value of the detected current with a reference value, and supply an adjusting driving voltage to an output stage of the buffer circuit based on results of the comparison for increasing a slew rate of the buffer circuit.
Claims14
A slew rate acceleration circuit in a buffer circuit, the slew rate acceleration circuit being configured to:
- detect, via a current detection circuit, a current flowing through a load stage of the buffer circuit, the load stage comprising a current mirror circuit;
- compare, via a control circuit, a value of the detected current with an adjustable reference value;
- and
- supply, via the control circuit, an adjusting driving voltage to an output stage comprising at least one driving transistor of the buffer circuit based on results of the comparison for increasing a slew rate of the buffer circuit,
- wherein the slew rate acceleration circuit comprises a first bias transistor and a second bias transistor, and is configured to adjust the adjustable reference value according to a first bias voltage applied to a gate electrode of the first bias transistor and a second bias voltage applied to a gate electrode of the second bias transistor,
- wherein the control circuit comprises at least one acceleration transistor, and a source electrode of the at least one acceleration transistor is connected to a gate electrode of the at least one driving transistor, and
- wherein the slew rate acceleration circuit is further configured to detect the current flowing through the load stage based on a gate voltage of a transistor constituting the current mirror circuit.
4 more elements
A buffer circuit comprising:
- an operational amplifier configured to amplify an input voltage and output an output voltage through an output node;
- a current detection circuit configured to:
- detect a current flowing through a load stage of the operational amplifier;
- a control circuit configured to:
- compare a value of the detected current with an adjustable reference value;
- and
- supply an adjusting driving voltage, to accelerate a slew rate of the operational amplifier, to an output stage comprising at least one driving transistor of the operational amplifier based on a control signal;
- and
- a slew rate acceleration circuit comprising a first bias transistor and a second bias transistor, and configured to adjust the adjustable reference value according to a first bias voltage applied to a gate electrode of the first bias transistor and a second bias voltage applied to a gate electrode of the second bias transistor,
- wherein each bias transistor is connected to the control circuit, and
- wherein the control circuit comprises at least one acceleration transistor, and a source electrode of the at least one acceleration transistor is connected to a gate electrode of the at least one driving transistor.
8 more elements
Dependencies are inferred from the claim text.