Semiconductor processing apparatus and method utilizing electrostatic discharge (ESD) prevention layer

A method, comprising:

• receiving, by a load port of a semiconductor processing apparatus, a semiconductor wafer in a Front Opening Unified Pod (FOUP);
• transferring, by first robotic wafer handling structure, the semiconductor wafer to a first processing chamber of the semiconductor processing apparatus;
• prior to returning the semiconductor wafer to the FOUP, contacting, by the semiconductor wafer, at least one electrostatic discharge (ESD) prevention layer including a first material and a second material, the second material having an electrical conductivity that is greater than an electrical conductivity of the first material, the at least one ESD prevention layer being disposed on at least one of the FOUP, the first robotic wafer handling structure, or a first wafer stage of the first processing chamber;
• wherein the second material comprises conductive particles having a particle size that is less than about 10 μm,
• transferring, by a second robotic wafer handling structure, the semiconductor wafer from the load port to a wafer orientor, the wafer orientor having a surface at least partially covered by a second ESD prevention layer;
• and
• contacting, by the semiconductor wafer, the second ESD prevention layer prior to the returning the semiconductor wafer to the FOUP.

A method, comprising:

• receiving, by a load port of a semiconductor processing apparatus, a semiconductor wafer in a Front Opening Unified Pod (FOUP);
• transferring, by a first robotic wafer handling structure, the semiconductor wafer to a first process chamber of the semiconductor processing apparatus;
• processing the semiconductor wafer in the first process chamber, the first process chamber including a first wafer stage configured to support the semiconductor wafer;
• and
• prior to returning the semiconductor wafer to the FOUP, contacting, by the semiconductor wafer, at least one electrostatic discharge (ESD) prevention layer including a first material and a second material, the second material having an electrical conductivity that is greater than an electrical conductivity of the first material, the at least one ESD prevention layer being disposed on at least one of the FOUP, the first robotic wafer handling structure, or the first wafer stage,
• transferring, by the first robotic wafer handling structure, the semiconductor wafer from the first process chamber to a load lock, subsequent to the processing the semiconductor wafer in the first process chamber, the load lock including a second wafer stage and a second ESD prevention layer on the second wafer stage;
• transferring, by a second robotic wafer handling structure, the semiconductor wafer from the load lock to a third wafer stage positioned between the load port and the load lock, the third wafer stage being at least partially covered by a third ESD prevention layer;
• and
• measuring, by a metrology device positioned over the third wafer stage, at least one parameter of the semiconductor wafer;
• wherein the ESD prevention layer includes a homogeneous mixture of the first material and the second material.