Semiconductor devices including a support pattern on a lower electrode structure
AssigneeSamsung Electronics Co., Ltd.
InventorsHyun-Suk Lee, Jungoo Kang, Gihee Cho, Sanghyuck Ahn
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes: forming electrode holes by etching a mold structure including a mold layer and a support layer which are stacked on a substrate; forming lower electrode pillars filling the electrode holes; etching a portion of the support layer between the lower electrode pillars to form a support pattern having a through-hole exposing a portion of a top surface of the mold layer; removing the mold layer through the through-hole to expose sidewalls of the lower electrode pillars; and selectively forming lower electrode patterns on the sidewalls and top surfaces of the lower electrode pillars.
Claims19
A method of manufacturing a semiconductor device, the method comprising:
- forming electrode holes by etching a mold structure including a mold layer and a support layer which are stacked on a substrate;
- forming lower electrode pillars filling the electrode holes;
- etching a portion of the support layer between the lower electrode pillars to form a support pattern having a through-hole exposing a portion of a top surface of the mold layer;
- forming metal residual patterns on a surface of the support pattern;
- removing the mold layer through the through-hole to expose sidewalls of the lower electrode pillars;
- and
- selectively forming lower electrode patterns on the sidewalls and top surfaces of the lower electrode pillars,
- wherein the metal residual patterns are spaced apart from the lower electrode patterns.
A method of manufacturing a semiconductor device, the method comprising:
- forming electrode holes by etching a mold structure including a mold layer and a support layer which are stacked on a substrate;
- forming lower electrode pillars filling the electrode holes;
- etching a portion of the support layer between the lower electrode pillars to form a support pattern having a through-hole exposing the mold layer;
- removing the mold layer through the through-hole to expose sidewalls of the lower electrode pillars;
- and
- forming lower electrode patterns on the sidewalls and top surfaces of the lower electrode pillars,
- wherein the forming of the lower electrode patterns comprises supplying a niobium precursor,
- wherein the niobium precursor includes a fluorine.
A method of manufacturing a semiconductor device, the method comprising:
- forming an electrode hole by etching a mold structure including a mold layer and a support layer which are stacked on a substrate;
- forming a lower electrode pillar filling the electrode hole, a sidewall of the lower electrode pillar comprising a first portion in contact with the molding layer and a second portion in contact with the support layer;
- etching the support layer to form a support pattern;
- removing the mold layer to expose the first portion of the sidewall of the lower electrode pillar;
- and
- forming a lower electrode pattern on the lower electrode pillar,
- wherein a top surface of the support pattern comprises a first portion connected to the sidewall of the lower electrode pillar and a second portion spaced apart from the sidewall of the lower electrode pillar,
- wherein the lower electrode pattern is in contact with the first portion of the sidewall of the lower electrode pillar and the first portion of the top surface of the support pattern, and is spaced apart from the second portion of the top surface of the support pattern,
- wherein the lower electrode pillar and the lower electrode pattern comprise different respective materials.
Dependencies are inferred from the claim text.