Semiconductor device, method of manufacturing the same and electronic device including the same

A method of manufacturing a semiconductor device, comprising:

• epitaxially growing a first source/drain layer on a substrate;
• epitaxially growing a channel layer on the first source/drain layer, wherein the channel layer comprises a semiconductor material causing an increased ON current and/or a reduced OFF current as compared to Si;
• epitaxially growing a second source/drain layer on the channel layer;
• defining an active region for the semiconductor device in the first source/drain layer, the channel layer, and the second source/drain layer;
• and
• forming a gate stack around a periphery of the channel layer, wherein the gate stack is self-aligned to the channel layer,
• the method further comprising:
• epitaxially growing a first leakage suppression layer and/or a first ON current enhancement layer between the first source/drain layer and the channel layer and/or a second leakage suppression layer and/or a second ON current enhancement layer between the channel layer and the second source/drain layer, wherein an upper surface of the gate stack is aligned with a lower surface of the second leakage suppression layer and/or the second ON current enhancement layer, and/or a lower surface of the gate stack is aligned with an upper surface of the first leakage suppression layer and/or the first ON current enhancement layer,
• the method further comprising:
• selectively etching the first leakage suppression layer and/or the first ON current enhancement layer and/or the second leakage suppression layer and/or the second ON current enhancement layer, so that the second source/drain layer extends outward relative to the second leakage suppression layer and/or the second ON current enhancement layer, and/or the first source/drain layer extends outward relative to the first leakage suppression layer and/or the first ON current enhancement layer,
• wherein the second leakage suppression layer and/or the second ON current enhancement layer extend or extends outward relative to the channel layer, and/or the first leakage suppression layer and/or the first ON current enhancement layer extend or extends outward relative to the channel layer, and
• wherein there is a crystal interface between adjacent layers among the channel layer, either of the first leakage suppression layer or second leakage suppression layer and/or either of the first ON current enhancement layer or second ON current enhancement layer.