# US 12,237,951 B2 · Amplitude optimized reflection canceller in parallel channel equalizers

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- Number: US 12,237,951 B2
- Document ID: US12237951B2
- Status: Granted
- Kind: B2
- Application number: 18/349,635
- Filed: 2023-07-10
- Published: 2023-11-02
- Granted: 2025-02-25
- Earliest claimed: 2021-01-15
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: Ehud Nir; Yanggao Qiu
- Web page: https://patentgrep.com/patent/US12237951B2

## CPC

- H04L 25/03343: {Arrangements at the transmitter end}
- H04L 27/01: Equalisers {(baseband equalizers at the transmitter end H04L25/03343; in analogue transmission systems H04B3/04, H04B7/005)}
- H04L 25/03057: {with a recursive structure (H04L25/03031 takes precedence)}
- H04L 27/0014: {Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657)}
- H04L 25/0212: {of impulse response}
- H04L 2027/0038: {using an equaliser}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Methods and systems for equalizing signals are disclosed. In an example, a method for equalizing a digital signal at an equalizer, comprises: receiving, at the equalizer, a plurality of samples of the signal in a plurality of unit intervals (UIs) of a channel response of the digital signal, the plurality of samples comprising a first plurality of samples of a primary response and a second plurality of samples of one or more reflection responses; equalizing, by the equalizer, the first plurality of samples using a first set bitwidth; equalizing the second plurality of samples using one or more further set bitwidths, wherein the first set bitwidth is greater than each of the one or more further set bitwidths; and generating, by the equalizer, an equalized digital signal.

## Claims

### Claim 1

A method for equalizing a digital signal at an equalizer, comprising:
receiving, at the equalizer, a plurality of samples of the signal in a plurality of unit intervals (UIs) of a channel response of the digital signal, the plurality of samples comprising a first plurality of samples of a primary response and a second plurality of samples of one or more reflection responses;
equalizing, by the equalizer, the first plurality of samples using a first set bitwidth;
equalizing the second plurality of samples using one or more further set bitwidths, wherein the first set bitwidth is greater than each of the one or more further set bitwidths; and
generating, by the equalizer, an equalized digital signal.

### Claim 2 (depends on 1)

The method of claim 1, wherein the plurality of UIs comprises a primary response UI section and one or more reflection response UI sections subsequent to the primary response UI section in time, the primary response UI section comprising the first plurality of samples and one or more reflection response UI sections comprising the second plurality of samples.

### Claim 3 (depends on 2)

The method of claim 2, wherein the primary response UI section and one or more reflection response UI sections comprise a continuous UI span of the channel response.

### Claim 4 (depends on 2)

The method of claim 2, wherein the primary response UI section and one or more reflection response UI sections comprise discrete UI spans in the channel response.

### Claim 5 (depends on 1)

The method of claim 1, wherein the primary response has an amplitude peak greater than each peak of the one or more reflection responses.

### Claim 6 (depends on 1)

The method of claim 1, wherein the first plurality of samples comprises all non-zero amplitude samples of the primary response.

### Claim 7 (depends on 6)

The method of claim 6, wherein the first plurality of samples further comprises one or more zero amplitude samples at each end of the primary response.

### Claim 8 (depends on 1)

The method of claim 1, wherein the second plurality of samples comprise all non-zero amplitude samples of the one or more reflection responses.

### Claim 9 (depends on 8)

The method of claim 8, wherein the second plurality of samples further comprise one or more zero amplitude samples at each end of each of the one or more reflection responses.

### Claim 10 (depends on 1)

The method of claim 1, wherein the one or more further set bitwidths for each of the one or more reflection responses are identical.

### Claim 11 (depends on 1)

The method of claim 1, wherein the one or more further set bitwidths decrease for successive bitwidths that respectively correspond to successive reflections of the of one or more reflection responses.

### Claim 12 (depends on 1)

The method of claim 1, wherein equalizing the first plurality of samples and the second plurality of samples comprises:
delaying, by a plurality of delays of the equalizer, each of the first plurality of samples and the second plurality of samples;
applying a weight, at a plurality of multipliers of the equalizer, to each of the delayed samples; and
adding, at one or more adders, the weighted samples for generating an equalized signal.

### Claim 13 (depends on 1)

The method of claim 1, wherein equalizing the first plurality of samples and the second plurality of samples comprises:
applying a weight, at a plurality of multipliers of the equalizer, to each of the first plurality of samples and the second plurality of samples;
generating, at one or more adders of the equalizer, a plurality of partial products from the weighted samples;
delaying, by a plurality of delays of the equalizer, each of the plurality of partial products; and
adding, at one or more adders, weighted partial products for generate an equalized signal.

### Claim 14 (depends on 1)

The method of claim 1, further comprising equalizing the first plurality of samples with a plurality of fixed taps and equalizing the second plurality of samples with a plurality of roaming taps.

### Claim 15

An equalizer for equalizing a digital signal, comprising:
a plurality of delays;
a plurality of multiplexers; and
one or more adders,
wherein the equalizer is configured to:
receive, at the plurality of delays or at the plurality of multiplexers, a plurality of samples of the signal in a plurality of unit intervals (UIs) of a channel response of the digital signal, the plurality samples comprising a first plurality of samples of a primary response and a second plurality of samples of one or more reflection responses;
equalize, at the plurality of delays and the plurality of multiplexers, the first plurality of samples using a first set bitwidth;
equalize, at the plurality of delays and the plurality of multiplexers, the second plurality of samples using one or more further bitwidths, wherein the first set bitwidth is greater than each of the one or more further bitwidths; and
generate, at the one or more adders, an equalized digital signal.

### Claim 16 (depends on 15)

The equalizer of claim 15, wherein the equalizer comprises a feed-forward equalizer (FFE).

### Claim 17 (depends on 15)

The equalizer of claim 15, wherein the equalizer comprises a decision feedback equalizer (DFE).

### Claim 18 (depends on 15)

The equalizer of claim 15, wherein the equalizer comprises an equalizer in an Analog to Digital converter.

### Claim 19 (depends on 15)

The equalizer of claim 15, wherein each of the second plurality of samples has an amplitude greater than or equal to a predetermined threshold.

### Claim 20 (depends on 16)

The equalizer of claim 16, wherein the equalizer is a parallel equalizer for concurrently equalizing 32, 64, or 128 digital signals.
