Solid state high power battery disrupter

A circuit breaker system, comprising:

• a field effect transistor comprising a source terminal, a gate terminal, and a drain terminal attached to a substrate body to control electrical conduction there through;
• a bus bar for electrical power transmission, comprising an input section connected to the source terminal and an output section connected to the drain terminal of the field effect transistor;
• a separate control voltage connected to the substrate at the gate terminal, wherein a positive voltage bias on the gate terminal provides a path for the electrical power transmission through the substrate, and a negative voltage bias on the gate terminal breaks electrical power through the substrate;
• wherein the substrate is doped to establish a p-n junction sufficient to withstand the electric power transmission and break the circuit from source to drain when the gate terminal is reverse biased;
• and
• wherein a reverse biased gate terminal comprises a gate voltage that is iteratively lowered over time;
• wherein the time over which the gate voltage is lowered corresponds to a response time of the substrate in establishing the p-n junction that discontinues electric power transmission from the source to the drain.