Large integer multiplication enhancements for graphics environment

A method comprising:

• receiving, by an execution resource of a graphics processor, operands for a multiplication operation, wherein the multiplication operation is part of a chain of multiplication operations for a large integer multiplication;
• issuing a multiply and add (MAD) instruction for the multiplication operation utilizing at least one of a double precision multiplier or a 48-bit output, wherein the MAD instruction to generate an output in a single clock cycle of the graphics processor, and wherein the MAD instruction utilizing the double precision multiplier generates a 64-bit output in the single clock cycle;
• combining a result of the MAD instruction with results of other MAD instructions to generate a final result for the large integer multiplication;
• and
• outputting the final result for the large integer multiplication.

A system comprising:

• a memory to store a block of data;
• and
• a processor coupled to the memory, the processor comprising:
• processing resources comprising multiplier circuitry to:
• receive operands for a multiplication operation, wherein the multiplication operation is part of a chain of multiplication operations for a large integer multiplication;
• and
• issue a multiply and add (MAD) instruction for the multiplication operation utilizing at least one of a double precision multiplier or a 48-bit output, wherein the MAD instruction to generate an output in a single clock cycle of the processor, and wherein the MAD instruction utilizing the double precision multiplier generates a 64-bit output in the single clock cycle.

A non-transitory computer-readable storage medium having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:

• receiving, by an execution resource of a graphics processor of the one or more processors, operands for a multiplication operation, wherein the multiplication operation is part of a chain of multiplication operations for a large integer multiplication;
• issuing a multiply and add (MAD) instruction for the multiplication operation utilizing at least one of a double precision multiplier or a 48-bit output, wherein the MAD instruction to generate an output in a single clock cycle of the graphics processor, and wherein the MAD instruction utilizing the double precision multiplier generates a 64-bit output in the single clock cycle;
• combining a result of the MAD instruction with results of other MAD instructions to generate a final result for the large integer multiplication;
• and
• outputting the final result for the large integer multiplication.