Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)

A memory controller comprising:

• error checking and correction (ECC) logic to detect a bank failure (“failed bank”) of one of N banks of a memory device addressable by a memory controller for active access;
• input/output (I/O) logic to send a command to the memory device to copy contents of the failed bank to distribute to the other (N-1) banks in a designated region of each of the other (N-1) banks of the memory device;
• and
• control logic to indicate reduction of memory space available for active access from N banks to the other (N-1) banks to a host operating system.

A method of managing errors for a memory, comprising:

• detecting a bank failure (“failed bank”) of one of N banks of a memory device addressable by a memory controller for active access;
• copying contents of the failed bank to distribute to the other (N-1) banks in a designated region of each of the other (N-1) banks of the memory device;
• and
• indicating reduction of memory space available for active access from N banks to the other (N-1) banks a host.