Data structure reconfiguration for low density parity checks (LDPCs) in memory systems

An electronic device, comprising:

• one or more processors;
• and
• memory storing one or more programs configured for execution by the one or more processors, the one or more programs comprising instructions for:
• obtaining a block of data corresponding to a plurality of first check nodes, wherein each first check node corresponds to a first subset of codeword symbols of the block of data, and has respective first check node data that indicates a likelihood of the first subset of codeword symbols being erroneous;
• identifying a memory block allocated to store first check node data of the plurality of first check nodes;
• regrouping data bits of the block of data to form a plurality of second check nodes, each second check node corresponding to a second subset of codeword symbols of the block of data, and having respective second check node data that indicates a likelihood of the second subset of codeword symbols being erroneous;
• and
• reconfiguring the memory block to store second check node data of the plurality of second check nodes, the plurality of second check nodes having a distinct number of check nodes from the plurality of first check nodes.

A non-transitory computer-readable storage medium storing one or more programs to be executed by one or more processors for compressing check node data, the one or more programs comprising instructions for:

• obtaining a block of data corresponding to a plurality of first check nodes, wherein each first check node corresponds to a first subset of codeword symbols of the block of data, and has respective first check node data that indicates a likelihood of the first subset of codeword symbols being erroneous;
• identifying a memory block allocated to store first check node data of the plurality of first check nodes;
• regrouping data bits of the block of data to form a plurality of second check nodes, each second check node corresponding to a second subset of codeword symbols of the block of data, and having respective second check node data that indicates a likelihood of the second subset of codeword symbols being erroneous;
• and
• reconfiguring the memory block to store second check node data of the plurality of second check nodes, the plurality of second check nodes having a distinct number of check nodes from the plurality of first check nodes.