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US 12,230,698 B2Granted
Thyristor, triac and transient-voltage-suppression diode manufacturing
AssigneeSTMicroelectronics (Tours) SAS
InventorsPatrick Hauttecoeur, Vincent Caro
Life of this patent
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Abstract
A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.
Claims27
A method of manufacturing a device, comprising:
- forming a step at a periphery of a semiconductor substrate;
- forming a first layer on top of and in contact with a first surface of the semiconductor substrate, the first layer extending at least on and in contact with walls and bottoms of said step;
- wherein the first layer is made of polysilicon doped with oxygen;
- and
- forming a second layer extending on and in contact with an upper surface of the first layer and extending on and in contact with an edge of the first layer to form, between the step and a central portion of the device, a boss;
- wherein the second layer is made of glass;
- wherein the forming of the second layer comprises:
- forming a first glass sub-layer on and in contact with the first layer;
- first wet etching of the first layer and the first glass sub-layer along a pattern of a first mask formed by photolithography;
- forming a second glass sub-layer on and in contact with the first glass sub-layer so that the second glass sub-layer covers the first glass sub-layer and edges of the first layer and the first glass sub-layer, to form the boss at an inner periphery of the step;
- and
- second wet etching of the second sub-layer along a pattern of a second mask formed by photolithography.
9 more elements
A method, comprising:
- forming a step at a periphery of a semiconductor substrate;
- depositing a first layer on top of and in contact with a first surface of the semiconductor substrate and extending at least on and in contact with a wall and bottom of said step;
- wherein the first layer is made of polysilicon doped with oxygen;
- and
- depositing a second layer extending on and in contact with the first layer and on edges of the first layer, said second layer forming a boss between the step and a central area of the device;
- wherein the second layer is made of glass;
- wherein depositing the second layer comprises:
- forming a first sub-layer on and in contact with the first layer;
- wherein the first sub-layer and first layer having an aligned edge;
- and
- forming a second sub-layer extending on and in contact with the first sub-layer;
- wherein the second sub-layer further extends to cover the aligned edge of the first layer and the first sub-layer;
- and
- wherein the second sub-layer still further extends on top of and in contact with the first surface of the semiconductor substrate.
11 more elements
A method, comprising:
- forming a step surface at a periphery of a semiconductor substrate that includes an upper surface;
- depositing a first layer made of polysilicon doped with oxygen, said first layer extending on and in contact with the step surface and on and in contact with a first portion of the upper surface, wherein said first layer further includes a first lateral edge at the upper surface;
- depositing a second layer made of glass, said second layer extending on and in contact with the first layer, wherein said second layer further includes a second lateral edge aligned with the first lateral edge;
- and
- depositing a third layer made of glass, said third layer extending on and in contact with the second layer, wherein said third layer further extends on and in contact with the first and second lateral edges, and wherein said third layer still further extends on and in contact with a second portion of the upper surface.
2 more elements
Dependencies are inferred from the claim text.