# US 12,230,687 B2 · Lateral gate material arrangements for quantum dot devices

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- Number: US 12,230,687 B2
- Document ID: US12230687B2
- Status: Granted
- Kind: B2
- Application number: 17/117,337
- Filed: 2020-12-10
- Published: 2022-06-16
- Granted: 2025-02-18
- Earliest claimed: 2020-12-10
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Roza Kotlyar; Stephanie A. Bojarski; Hubert C. George; Payam Amin; Patrick H. Keys; Ravi Pillarisetty; Roman Caudillo; Florian Luethi; James S. Clarke
- Web page: https://patentgrep.com/patent/US12230687B2

## CPC

- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 62/814: {Quantum box structures}
- G06N 10/00: Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- H10D 30/402: {Single electron transistors; Coulomb blockade transistors}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 48/3835: {Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits}
- H10D 62/118: {Nanostructure semiconductor bodies}
- H10D 62/8161: {potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices (lateral superlattices, lateral surface superlattices H10D62/8181)}
- H10D 64/27: Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D 64/661: {the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation (having lateral variation in the gate structure H10D64/671)}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- B82Y 30/00: Nanotechnology for materials or surface science, e.g. nanocomposites
- G06N 10/40: Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
- H10D 30/014: {of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors}
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 64/671: {the conductor having lateral variation in doping or structure}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

Disclosed herein are lateral gate material arrangements for quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; and a gate above the quantum well stack, wherein the gate includes a gate electrode, the gate electrode includes a first material proximate to side faces of the gate and a second material proximate to a center of the gate, and the first material has a different material composition than the second material.

## Claims

### Claim 1

A quantum dot device, comprising:
a quantum well stack; and
a gate above the quantum well stack, wherein the gate includes a gate electrode, the gate electrode includes a first material proximate to side faces of the gate and a second material proximate to a center of the gate, one of the first material and the second material includes a p-type material, and another one of the first material and the second material includes an n-type material.

### Claim 2 (depends on 1)

The quantum dot device of claim 1, wherein the first material has a different conductivity type than the second material.

### Claim 3 (depends on 1)

The quantum dot device of claim 1, wherein the p-type material includes tungsten, titanium and nitrogen, or palladium.

### Claim 4 (depends on 1)

The quantum dot device of claim 1, wherein the n-type material includes aluminum, copper, zirconium, or hafnium.

### Claim 5 (depends on 1)

The quantum dot device of claim 1, wherein the first material has a thickness between 2 nanometers and 5 nanometers.

### Claim 6 (depends on 1)

The quantum dot device of claim 1, wherein the gate includes a gate dielectric, and a portion of the first material is between the second material and the gate dielectric.

### Claim 7 (depends on 1)

The quantum dot device of claim 1, wherein the gate includes a gate dielectric, and a portion of the first material is not between the second material and the gate dielectric.

### Claim 8

A quantum dot device, comprising:
a quantum well stack;
a first gate above the quantum well stack;
a second gate above the quantum well stack; and
a third gate above the quantum well stack,
wherein the second gate includes a first gate electrode material and a second gate electrode material, the first gate electrode material is between the second gate electrode material and the first gate, and the first gate electrode material is between the second gate electrode material and the third gate, and
wherein one of the first gate electrode material and the second gate electrode material includes a p-type material, and another one of the first gate electrode material and the second gate electrode material includes an n-type material.

### Claim 9 (depends on 8)

The quantum dot device of claim 8, wherein the second gate is adjacent to the first gate and spaced apart from the first gate by an insulating material.

### Claim 10 (depends on 9)

The quantum dot device of claim 9, wherein the insulating material includes a spacer.

### Claim 11 (depends on 8)

The quantum dot device of claim 8, wherein the first gate includes a third gate electrode material and a fourth gate electrode material different from the third gate electrode material, and the third gate electrode material is between the fourth gate electrode material and the second gate.

### Claim 12 (depends on 11)

The quantum dot device of claim 11, wherein the third gate electrode material has a different conductivity type than the fourth gate electrode material.

### Claim 13 (depends on 11)

The quantum dot device of claim 11, wherein the fourth gate electrode material has a different material composition than the second gate electrode material.

### Claim 14 (depends on 8)

The quantum dot device of claim 8, wherein the quantum well stack includes silicon and germanium.

### Claim 15 (depends on 8)

The quantum dot device of claim 8, wherein the quantum well stack is at least partially included in a fin.

### Claim 16 (depends on 8)

The quantum dot device of claim 8, wherein the first gate is at least partially disposed in a trench in an insulating material above the quantum well stack.

### Claim 17

A quantum computing device, comprising:
a quantum processing device, wherein the quantum processing device includes a quantum well stack and a gate having a gate electrode including a gate edge material having a first conductivity type and a gate center material having a second conductivity type different from the first conductivity type, wherein one of the gate edge material and the gate center material includes a p-type material, and another one of the gate edge material and the gate center material includes an n-type material; and
a non-quantum processing device, coupled to the quantum processing device, to control voltages applied to the gate.

### Claim 18 (depends on 17)

The quantum computing device of claim 17, further comprising:
a memory device to store data generated by quantum dots formed in the quantum well stack during operation of the quantum processing device.

### Claim 19 (depends on 1)

The quantum dot device of claim 1, wherein the gate is a first gate, and the quantum dot device further includes:
a second gate above the quantum well stack, wherein the first material is between the second material and the second gate.

### Claim 20 (depends on 1)

The quantum dot device of claim 1, wherein the gate electrode is a first gate electrode, the second gate includes a second gate electrode, the second gate electrode includes a third material proximate to side faces of the second gate and a fourth material proximate to a center of the second gate, and the third material has a different material composition than the fourth material.

### Claim 21 (depends on 8)

The quantum dot device of claim 8, wherein the quantum well stack includes silicon.