Semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorIsao Saito
Life of this patent
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Abstract
A semiconductor device including a first line configured to receive a power supply voltage, a second line configured to be coupled to a load of the semiconductor device, first and second metal-oxide-semiconductor (MOS) transistors coupled in series between the first line and the second line, each of the first and second MOS transistors having a drain electrode and a gate electrode, the drain electrode of the first MOS transistor being coupled to the drain electrode of the second MOS transistor, a third line coupled to the gate electrode of the first MOS transistor, and a fourth line coupled to the gate electrode of the second MOS transistor, the third and fourth lines being electrically separated from each other.
Claims10
A semiconductor device comprising:
- a first line configured to receive a power supply voltage;
- a second line configured to be coupled to a load of the semiconductor device;
- first and second metal-oxide-semiconductor (MOS) transistors coupled in series between the first line and the second line, each of the first and second MOS transistors having a drain electrode and a gate electrode, the drain electrode of the first MOS transistor being coupled to the drain electrode of the second MOS transistor;
- a third line coupled to the gate electrode of the first MOS transistor;
- a fourth line coupled to the gate electrode of the second MOS transistor, the third and fourth lines being electrically separated from each other;
- a charge pump circuit configured to output a predetermined voltage in response to a first instruction signal;
- and
- a separation circuit configured to receive the predetermined voltage from the charge pump circuit, and to apply the predetermined voltage to both the third line and the fourth line, but separately, to turn on the first and second MOS transistors.
A semiconductor device, comprising:
- a first line configured to receive a power supply voltage;
- a second line configured to be coupled to a load of the semiconductor device;
- first and second metal-oxide-semiconductor (MOS) transistors coupled in series between the first line and the second line, each of the first and second MOS transistors having a drain electrode and a gate electrode, the drain electrode of the first MOS transistor being coupled to the drain electrode of the second MOS transistor;
- a third line coupled to the gate electrode of the first MOS transistor;
- a fourth line coupled to the gate electrode of the second MOS transistor, the third and fourth lines being electrically separated from each other;
- and
- a third MOS transistor having
- a gate electrode and a source electrode that are coupled to the second line, and
- a drain electrode coupled to the third line, wherein
- the third MOS transistor is a depletion-type transistor.
Dependencies are inferred from the claim text.