Device with neural network

A method with a neural network, the method comprising:

• generating a column signal based on input signals and resistive memory elements of a plurality of synaptic memory cells, to which the input signals are applied through a plurality of input lines, arranged along a first output line;
• generating a reference signal based on the input signals and reference memory elements having a reference resistance value of a plurality of reference memory cells, to which the input signals are applied, arranged along a reference line with sharing the plurality of input lines with the plurality of synaptic memory cells;
• and
• generating an output signal, for the first output line, indicating a difference between the column signal and the reference signal,
• wherein the generating comprises generating, as the output signal, a current corresponding to an integer multiple of a net current that is a difference between a first current based on a resistive memory element with the first resistance value and a second current based on a resistive memory element with the second resistance value.

A device with a neural network, comprising:

• a plurality of synaptic memory cells comprising a plurality of resistive memory elements, each having either one of a first resistance value and a second resistance value, and configured to generate a column bit signal based on input signals being received through input lines;
• a plurality of reference memory cells comprising a plurality of reference memory elements, each having the second resistance value, arranged along a reference line with sharing the input lines with the plurality of synaptic memory cells, and configured to generate reference bit signal based on the input signals;
• and
• an output circuit configured to:
• generate a column integrated signal by integrating the column bit signal for each bit of the synaptic memory cell and generate a reference integrated signal by integrating the reference bit signal for each bit of the reference memory cell;
• and
• generate an output signal corresponding to a difference between the column integrated signal and the reference integrated signal,
• wherein the output circuit is configured to generate, as the output signal, a current corresponding to an integer multiple of a net current that is a difference between a first current based on a resistive memory element with the first resistance value and a second current based on a resistive memory element with the second resistance value.