Memory device with failed main bank repair using redundant bank

A memory system, comprising:

• a memory device configured to store data, the memory device comprising:
• an array of memory cells comprising P groups of banks, each group of banks comprising N main banks and M redundant banks, where each of P, N and M is a positive integer, and N is greater than M;
• an input/output (I/O) circuit coupled to the P groups of banks and configured to direct P×N pieces of data to or from P×N working banks, respectively, wherein one of the M redundant banks is coupled with at least two main banks of the N main banks through the I/O circuit;
• and
• I/O control logic coupled to the I/O circuit and configured to:
• in responding to K main banks of the P groups of banks failed, determine the P×N working banks comprising K redundant banks of P×M redundant banks, where K is a positive integer not greater than P;
• and
• control the I/O circuit to direct P×N pieces of data to or from the P×N working banks, respectively;
• and
• a memory controller coupled to the memory device and configured to control the memory device.