# US 12,225,829 B2 · Semiconductor structure, electrode structure and method of forming the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,225,829 B2
- Document ID: US12225829B2
- Status: Granted
- Kind: B2
- Application number: 18/167,907
- Filed: 2023-02-13
- Published: 2023-06-22
- Granted: 2025-02-11
- Earliest claimed: 2016-01-15
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Chung-Yen Chou; Fu-Ting Sung; Yao-Wen Chang; Shih-Chang Liu
- Web page: https://patentgrep.com/patent/US12225829B2

## CPC

- H10N 50/10: Magnetoresistive devices
- H10N 50/01: Manufacture or treatment
- H10N 50/80: Constructional details
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed.

## Claims

### Claim 1

A method for manufacturing a semiconductor structure, comprising:
depositing a dielectric layer over a top surface of a first metal layer;
forming a bottom electrode via (BEVA) hole penetrating the dielectric layer;
forming a diffusion barrier layer and a flowable film over the dielectric layer and in the BEVA hole, wherein a portion of the diffusion barrier layer overlapping a top surface of the dielectric layer is exposed through the flowable film;
employing an etching operation to remove the diffusion barrier layer at a faster rate than the flowable film until a top surface of the diffusion barrier layer is lower than a top surface of the dielectric layer; and
forming a magnetic tunneling junction (MTJ) structure over the top surface of the dielectric layer and covering the diffusion barrier layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the deposition of the dielectric layer over the top surface of the first metal layer comprises:
depositing a first silicon carbide (SiC) layer;
depositing a tetraethyl orthosilicate (TEOS) layer or a silicon-rich oxide (SRO) layer over the SiC layer; and
depositing a second SiC layer over the TEOS or the SRO layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein a width of the BEVA hole proximal to the first metal layer is less than a width of the BEVA hole proximal to the top surface of the dielectric layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein the formation of the diffusion barrier layer and the flowable film comprises:
depositing the diffusion barrier layer over the dielectric layer and in the BEVA hole;
applying the flowable film over the diffusion barrier layer and in the BEVA hole; and
partially removing the flowable film above a top surface of the first material of the diffusion barrier layer.

### Claim 5 (depends on 1)

The method of claim 1, wherein a first portion of the flowable film is removed by the etching operation, and a second portion of the flowable film remains over a central region of the diffusion layer.

### Claim 6 (depends on 5)

The method of claim 5, wherein the central region of the diffusion barrier layer in the BEVA hole is protected by the second portion of the flowable film during the etching operation, and a thickness of the diffusion barrier layer after the etching operation is substantially equal to a thickness of the flowable film at a bottom of the BEVA hole.

### Claim 7 (depends on 1)

The method of claim 1, wherein the formation of the diffusion barrier layer and the flowable film comprises:
depositing a diffusion barrier layer having a thickness of about half of the depth of the BEVA hole, thereby defining an empty space in the BEVA hole over the diffusion barrier layer;
filling the empty space with the flowable film; and
performing an annealing operation to vaporize at least a part of a solvent included in the flowable film.

### Claim 8

A method for manufacturing a semiconductor structure, comprising:
forming a bottom electrode via (BEVA) hole in a dielectric layer over a first metal layer, wherein the BEVA hole exposes a portion of a metal line in the first metal layer;
forming a flowable film over and surrounded by a diffusion barrier layer in the BEVA hole;
selectively etching away a portion of the diffusion barrier layer until a top surface of the diffusion barrier layer is lower than a top surface of the dielectric layer;
filling the BEVA hole with a first electrode material;
forming a second electrode material over the first electrode material;
forming a magnetic tunneling junction (MTJ) structure over the second electrode material;
forming a top electrode over the MTJ structure; and
forming a second metal layer over the top electrode.

### Claim 9 (depends on 8)

The method of claim 8, wherein forming the flowable film over and surrounded by a diffusion barrier layer in the BEVA hole comprises:
depositing the diffusion barrier layer over the dielectric layer and in the BEVA hole; and
applying the flowable film over the diffusion barrier layer through a spin coating method, a microscopic spraying method, or a rotation roller method.

### Claim 10 (depends on 8)

The method of claim 8, wherein the flowable film includes a bottom antireflection coating (BARC).

### Claim 11 (depends on 9)

The method of claim 9, wherein the selectively etching away the portion of the diffusion barrier layer comprises:
etching the diffusion barrier layer at a faster rate than etching the flowable film, wherein a portion of the flowable film remains over a central region of the diffusion barrier layer in the BEVA hole.

### Claim 12 (depends on 8)

The method of claim 8, wherein the first electrode material includes TiN.

### Claim 13 (depends on 8)

The method of claim 8, wherein the dielectric layer is a multi-layer structure, and includes a first SiC layer, a TEOS layer or an SRO layer, and a second SiC layer from bottom to top.

### Claim 14 (depends on 13)

The method of claim 13, further comprising:
performing a planarization after the formation of the first electrode material to remove the second SiC layer and to align a top surface of the first electrode material with a top surface of the TEOS layer or an SRO layer.

### Claim 15 (depends on 8)

The method of claim 8, further comprising:
reducing a thickness of the second electrode material prior to the formation of the MTJ structure.

### Claim 16

A method for manufacturing a semiconductor structure, comprising:
depositing a dielectric layer over a top surface of a first metal layer;
forming a tapered hole penetrating the dielectric layer over the first metal layer;
depositing a diffusion barrier layer lining the tapered hole;
filling the tapered hole with a flowable film;
performing a selective etch upon the diffusion barrier layer and the flowable film;
removing a remaining portion of the flowable film;
forming a bottom electrode over the diffusion barrier layer; and
forming a magnetic tunneling junction (MTJ) structure over the dielectric layer and covering the diffusion barrier layer.

### Claim 17 (depends on 16)

The method of claim 16, further comprising:
removing a portion of the flowable film to expose the diffusion barrier layer and without removing the flowable film in a recess over the tapered hole.

### Claim 18 (depends on 16)

The method of claim 16, wherein the deposition of the dielectric layer over the top surface of the first metal layer comprises:
depositing a first silicon carbide (SiC) layer;
depositing a tetraethyl orthosilicate (TEOS) layer or a silicon-rich oxide (SRO) layer over the first SiC layer; and
depositing a second SiC layer over the TEOS or the SRO layer.

### Claim 19 (depends on 16)

The method of claim 16, wherein a cross sectional view of the tapered hole includes an upper portion with a trapezoidal shape and a lower portion with a rectangular shape.

### Claim 20 (depends on 16)

The method of claim 16, further comprising:
forming a top electrode over the MTJ structure; and
forming a second metal layer over the top electrode.