# US 12,225,785 B2 · Display substrate having pixel circuit comprising resistance device connected between driving sub-circuit and light-emitting element, and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,225,785 B2 - Document ID: US12225785B2 - Status: Granted - Kind: B2 - Application number: 17/430,403 - Filed: 2020-03-19 - Published: 2022-09-29 - Granted: 2025-02-11 - Earliest claimed: 2020-03-19 - Assignees: Boe Technology Group Co., Ltd. - Applicants: Boe Technology Group Co., Ltd. - Inventors: Dachao Li - Web page: https://patentgrep.com/patent/US12225785B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10D 86/40: characterised by multiple TFTs - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1213: {the pixel elements being TFTs} - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0833: forming a linear amplifier or follower - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/02: Improving the quality of display appearance - G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes - H10K 59/121: characterised by the geometry or disposition of pixel elements - H10K 59/35: comprising red-green-blue [RGB] subpixels - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixel includes a pixel circuit including a data writing sub-circuit, a storage sub-circuit, a driving sub-circuit and a resistance device. The resistance device is connected between the driving sub-circuit and the light-emitting element, and is in a same layer as a control electrode of the driving sub-circuit and is insulated from the control electrode. A resistivity of the resistance device is higher than a resistivity of the control electrode of the driving sub-circuit. ## Claims ### Claim 1 A display substrate, comprising a base substrate and a sub-pixel on the base substrate, wherein the sub-pixel comprises a pixel circuit, and the pixel circuit comprises a data writing sub-circuit, a storage sub-circuit, a driving sub-circuit, and a resistance device, the data writing sub-circuit is electrically connected with a first terminal of the storage sub-circuit, and is configured to transmit a data signal to the first terminal of the storage sub-circuit in response to a control signal, the driving sub-circuit comprises a control electrode, a first electrode and a second electrode, the control electrode of the driving sub-circuit is electrically connected with the first terminal of the storage sub-circuit, the first electrode of the driving sub-circuit is configured to receive a first power supply voltage, and the second electrode of the driving sub-circuit is electrically connected with a first terminal of the resistance device; a second terminal of the resistance device is configured to be electrically connected with a first electrode of a light-emitting element, and the driving sub-circuit is configured to drive the light-emitting element to emit light in response to a voltage at the first terminal of the storage sub-circuit; and the resistance device and the control electrode of the driving sub-circuit are in a same layer and insulated from each other, and a resistivity of the resistance device is higher than a resistivity of the control electrode of the driving sub-circuit; the control signal comprises a first control signal, the data writing sub-circuit comprises a first data writing transistor, the driving sub-circuit comprises a driving transistor, the first data writing transistor is a P-type metal-oxide semiconductor field effect transistor, and the driving transistor is an N-type metal-oxide semiconductor field effect transistor; a gate electrode of the first data writing transistor is configured to receive the first control signal, a first electrode of the first data writing transistor is configured to receive the data signal, a second electrode of the first data writing transistor is electrically connected with the first terminal of the storage sub-circuit and the control electrode of the driving sub-circuit; and a gate electrode, a first electrode and a second electrode of the driving transistor respectively serve as the control electrode, the first electrode and the second electrode of the driving sub-circuit; the storage sub-circuit comprises a storage capacitor, the storage capacitor comprises a first capacitor electrode and a second capacitor electrode, and the first capacitor electrode and the second capacitor electrode respectively serve as the first terminal and a second terminal of the storage sub-circuit; and the first capacitor electrode and the resistance device are in a same layer and insulated from each other. ### Claim 2 (depends on 1) The display substrate according to claim 1, wherein the resistance device and the control electrode of the driving sub-circuit are both made of a polysilicon material. ### Claim 3 (depends on 1) The display substrate according to claim 1, wherein a PN junction is formed between the second electrode of the driving sub-circuit and the base substrate, and a resistance value of the resistance device is configured to turn off the PN junction in a case that the driving transistor operates in a saturation region. ### Claim 4 (depends on 3) The display substrate according to claim 3, wherein the resistance value of the resistance device R > ❘ "\[LeftBracketingBar]" Vs - Von - Vcom ⁢ 1 ❘ "\[RightBracketingBar]" Is , where Vs is a bias voltage of the base substrate, Vcom1 is a common voltage provided for a second electrode of the light-emitting element, Von is a turn-on voltage of the PN junction, and Is is a saturation current of the driving transistor. ### Claim 5 (depends on 1) The display substrate according to claim 1, wherein in a direction parallel to a plate surface of the base substrate, the first data writing transistor and the driving transistor are on opposite sides of the storage capacitor. ### Claim 6 (depends on 5) The display substrate according to claim 5, wherein in the direction parallel to the plate surface of the base substrate, the resistance device and the first data writing transistor are on a same side of the first capacitor electrode. ### Claim 7 (depends on 5) The display substrate according to claim 5, wherein the resistance device is a U-shaped structure, and an opening of the U-shaped structure faces the first capacitor electrode; and the first terminal and the second terminal of the resistance device are respectively at two ends of the U-shaped structure. ### Claim 8 (depends on 7) The display substrate according to claim 7, wherein in the direction parallel to the plate surface of the base substrate, the second terminal of the resistance device is closer to the driving transistor. ### Claim 9 (depends on 1) The display substrate according to claim 1, wherein the sub-pixel further comprises a first connection electrode, and the first connection electrode connects the first terminal of the resistance device with the second terminal of the driving transistor. ### Claim 10 (depends on 9) The display substrate according to claim 9, wherein the first connection electrode is electrically connected with the first terminal of the resistance device through a first via hole, and is electrically connected with the second electrode of the driving transistor through a second via hole; and in a direction parallel to a plate surface of the base substrate, the first via hole and the second via hole are respectively on opposite sides of the first capacitor electrode. ### Claim 11 (depends on 9) The display substrate according to claim 9, wherein the storage capacitor further comprises a third capacitor electrode; and in a direction perpendicular to the base substrate, the third capacitor electrode is on a side of the first capacitor electrode away from the second capacitor electrode, and is configured to be electrically connected with the second capacitor electrode. ### Claim 12 (depends on 11) The display substrate according to claim 11, wherein the third capacitor electrode and the first connection electrode are in a same layer and insulated from each other and are made of a same material. ### Claim 13 (depends on 11) The display substrate according to claim 11, wherein the third capacitor electrode comprises a first portion and a second portion spaced apart from each other, and the first portion and the second portion are respectively on two sides of the first connection electrode, and are configured to be electrically connected with the second capacitor electrode respectively. ### Claim 14 (depends on 1) The display substrate according to claim 1, wherein the second capacitor electrode of the storage capacitor is a first region of the base substrate, and the second capacitor electrode is overlapped with the first capacitor electrode in a direction perpendicular to the base substrate. ### Claim 15 (depends on 1) The display substrate according to claim 1, wherein the first capacitor electrode of the storage capacitor and the gate electrode of the driving transistor are in a same layer and are in an integral structure. ### Claim 16 (depends on 1) The display substrate according to claim 1, comprising four sub-pixels, the four sub-pixels constituting a pixel unit group, wherein the four sub-pixels are arranged in an array along a first direction and a second direction, and the first direction intersects with the second direction; and orthographic projections of the resistance devices of the four sub-pixels on the base substrate are in a same N-type well region in the base substrate. ### Claim 17 (depends on 16) The display substrate according to claim 16, wherein the resistance devices of sub-pixels adjacent in the first direction are symmetrical about a symmetry axis along the second direction, and the resistance devices of sub-pixels adjacent in the second direction are symmetrical about a symmetry axis along the first direction. ### Claim 18 (depends on 16) The display substrate according to claim 16, wherein the storage sub-circuit comprises a storage capacitor, the storage capacitor comprises a first capacitor electrode and a second capacitor electrode, the first capacitor electrode and the second capacitor electrode respectively serve as the first terminal and a second terminal of the storage sub-circuit; and the first capacitor electrodes of two sub-pixels adjacent in the first direction are symmetrical about a first symmetry axis along the second direction, and the first capacitor electrodes of two sub-pixels adjacent in the second direction are symmetrical about a second symmetry axis along the first direction. ### Claim 19 (depends on 18) The display substrate according to claim 18, wherein orthographic projections of the first capacitor electrodes of the four sub-pixels on the base substrate are outside the N-type well region and surround the N-type well region. ### Claim 20 (depends on 18) The display substrate according to claim 18, wherein the storage capacitor further comprises a third capacitor electrode; in a direction perpendicular to the base substrate, the third capacitor electrode is on a side of the first capacitor electrode away from the second capacitor electrode, and is configured to be electrically connected with the second capacitor electrode; the third capacitor electrodes of two sub-pixels adjacent in the first direction are symmetrical about a third symmetry axis along the second direction, and the third capacitor electrodes of two sub-pixels adjacent in the second direction are symmetrical about a fourth symmetry axis along the first direction. ### Claim 21 (depends on 20) The display substrate according to claim 20, wherein the third capacitor electrode comprises a first portion and a second which are portion spaced apart from each other in the first direction, and the first portion and the second portion are respectively configured to be electrically connected with the second capacitor electrode; and the first portions of the third capacitor electrodes of two sub-pixels adjacent in the first direction are connected with each other as an integral structure. ### Claim 22 (depends on 21) The display substrate according to claim 21, comprising a plurality of the pixel unit groups arranged along the first direction, wherein the second portion of the third capacitor electrode of each sub-pixel in each of the pixel unit groups and the second portion of the third capacitor electrode of a sub-pixel adjacent to the each sub-pixel in a pixel unit group adjacent to the each pixel unit group are connected to each other to form an integrated structure. ### Claim 23 (depends on 16) The display substrate according to claim 16, wherein the control signal comprises a first control signal and a second control signal, the data writing sub-circuit comprises a first data writing transistor and a second data writing transistor, and a gate electrode of the first data writing transistor is configured to receive the first control signal, and a gate electrode of the second data writing transistor is configured to receive the second control signal; a first electrode of the first data writing transistor is electrically connected with a first electrode of the second data writing transistor, and is configured to receive the data signal; a second electrode of the first data writing transistor is electrically connected with a second electrode of the second data writing transistor, and is electrically connected with both the first terminal of the storage sub-circuit and the control electrode of the driving sub-circuit; and the second data writing transistors of the four sub-pixels are all located in a same N-type well region. ### Claim 24 (depends on 23) The display substrate according to claim 23, the gate electrodes of the second data writing transistors of two sub-pixels adjacent in the first direction are symmetrical about a symmetry axis along the second direction and are connected as an integral structure; and the gate electrodes of the second data writing transistors of two sub-pixels adjacent in the second direction are symmetrical about a symmetry axis along the first direction. ### Claim 25 (depends on 23) The display substrate according to claim 23, wherein the first electrodes of the second data writing transistors of two sub-pixels adjacent in the second direction are symmetrical about a symmetry axis along the first direction and are connected as an integral structure; and the first electrodes of the second data writing transistors of two sub-pixels adjacent in the first direction are symmetrical about a symmetry axis along the second direction. ### Claim 26 (depends on 1) The display substrate according to claim 1, wherein the pixel circuit further comprises a bias sub-circuit, the bias sub-circuit comprises a control terminal, a first terminal and a second terminal, the control terminal of the bias sub-circuit is configured to receive a bias signal, the first terminal of the bias sub-circuit and the second terminal of the storage sub-circuit are both configured to receive a second power supply voltage, and the second terminal of the bias sub-circuit is electrically connected with both the second electrode of the driving sub-circuit and the first terminal of the resistance device. ### Claim 27 (depends on 1) A display device, comprising the display substrate according to claim 1 and the light-emitting element on the display substrate, wherein the first electrode of the light-emitting element is electrically connected with the second terminal of the resistance device. ### Claim 28 A display substrate, comprising a base substrate and a sub-pixel on the base substrate, wherein the sub-pixel comprises a pixel circuit, and the pixel circuit comprises a data writing sub-circuit, a storage sub-circuit, a driving sub-circuit, and a resistance device, the data writing sub-circuit is electrically connected with a first terminal of the storage sub-circuit, and is configured to transmit a data signal to the first terminal of the storage sub-circuit in response to a control signal, the driving sub-circuit comprises a control electrode, a first electrode and a second electrode, the control electrode of the driving sub-circuit is electrically connected with the first terminal of the storage sub-circuit, the first electrode of the driving sub-circuit is configured to receive a first power supply voltage, and the second electrode of the driving sub-circuit is electrically connected with a first terminal of the resistance device; a second terminal of the resistance device is configured to be electrically connected with a first electrode of a light-emitting element, and the driving sub-circuit is configured to drive the light-emitting element to emit light in response to a voltage at the first terminal of the storage sub-circuit; and the resistance device and the control electrode of the driving sub-circuit are in a same layer and insulated from each other, and a resistivity of the resistance device is higher than a resistivity of the control electrode of the driving sub-circuit; the control signal comprises a first control signal, the data writing sub-circuit comprises a first data writing transistor, the driving sub-circuit comprises a driving transistor, the first data writing transistor is a P-type metal-oxide semiconductor field effect transistor, and the driving transistor is an N-type metal-oxide semiconductor field effect transistor; a gate electrode of the first data writing transistor is configured to receive the first control signal, a first electrode of the first data writing transistor is configured to receive the data signal, a second electrode of the first data writing transistor is electrically connected with the first terminal of the storage sub-circuit and the control electrode of the driving sub-circuit; and a gate electrode, a first electrode and a second electrode of the driving transistor respectively serve as the control electrode, the first electrode and the second electrode of the driving sub-circuit; the control signal further comprises a second control signal, the data writing sub-circuit further comprises a second data writing transistor, and the second data writing transistor is an N-type metal-oxide semiconductor field effect transistor, and a gate electrode of the second data writing transistor is configured to receive a second control signal, a first electrode of the second data writing transistor is electrically connected with the first electrode of the first data writing transistor, and a second electrode of the second data writing transistor is electrically connected with the second electrode of the first data writing transistor. ### Claim 29 (depends on 28) The display substrate according to claim 28, wherein the gate electrode of the first data writing transistor and the gate electrode of the second data writing transistor are arranged side by side along a first direction, and are symmetrical about a symmetry axis along a second direction; and the first direction intersects with the second direction. ### Claim 30 (depends on 28) The display substrate according to claim 28, wherein the sub-pixel further comprises a second connection electrode, and the second connection electrode comprises a first end, a second end, and a third end, and the first end of the second connection electrode is electrically connected with the second electrode of the first data writing transistor, the second end of the second connection electrode is electrically connected with the second electrode of the second data writing transistor, and the third end of the second connection electrode is electrically connected with the first terminal of the storage sub-circuit.