# US 12,225,770 B2 · Light emitting display device and manufacturing method thereof

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- Number: US 12,225,770 B2
- Document ID: US12225770B2
- Status: Granted
- Kind: B2
- Application number: 18/525,662
- Filed: 2023-11-30
- Published: 2024-03-28
- Granted: 2025-02-11
- Earliest claimed: 2020-03-06
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., LTD.
- Inventors: Keun Woo Kim; Tae Wook Kang; Han Bit Kim; Bum Mo Sung; Do Kyeong Lee; Jae Seob Lee
- Web page: https://patentgrep.com/patent/US12225770B2

## CPC

- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/6731: {Top-gate only TFTs}
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6733: {Multi-gate TFTs}
- H10D 30/6736: {characterised by the shape of gate insulators}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 86/0223: {comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials}
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 59/1201: {Manufacture or treatment}
- H10K 2101/00: Properties of the organic materials covered by group H10K85/00
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3454: {Amorphous}
- H10P 14/3602: {In-situ cleaning}
- H10P 14/3808: {using laser beams}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A light emitting display device includes: a light emitting element; a second transistor connected to a scan line; a first transistor which applies a current to the light emitting element; a capacitor connected to a gate electrode of the first transistor; and a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor. Channels of the second transistor, the first transistor, and the third transistor are disposed in a polycrystalline semiconductor layer, and a width of a channel of the third transistor is in a range of about 1 μm to about 2 μm, and a length of the channel of the third transistor is in a range of about 1 μm to about 2.5 μm.

## Claims

### Claim 1

A light emitting display device, comprising:
a light emitting element;
a second transistor connected to a scan line;
a first transistor which applies a current to the light emitting element;
a capacitor connected to a gate electrode of the first transistor; and
a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor,
wherein a channel of the third transistor includes a polycrystalline semiconductor, and
a width of a channel of the third transistor is in a range of 1 μm to 2 μm, and a length of the channel of the third transistor is in a range of 1 μm to 2.5 μm.

### Claim 2 (depends on 1)

The light emitting display device of claim 1, wherein
the third transistor has a dual structure.

### Claim 3 (depends on 2)

The light emitting display device of claim 2, wherein
the width of the channel of the third transistor is in a range of ⅓ to ½ of a width of the channel of the first transistor.

### Claim 4 (depends on 1)

The light emitting display device of claim 1, further comprising:
a fourth transistor which initializes the gate electrode of the first transistor to an initializing voltage,
wherein a width of a channel of the fourth transistor is in a range of 1 μm to 2 μm, and a length of the channel of the fourth transistor is in a range of 1 μm to 2.5 μm.

### Claim 5 (depends on 4)

The light emitting display device of claim 4, wherein
the fourth transistor has a dual structure.

### Claim 6 (depends on 5)

The light emitting display device of claim 5, wherein
the width of the channel of the fourth transistor is in a range of ⅓ to ½ of a width of the channel of the first transistor.

### Claim 7 (depends on 6)

The light emitting display device of claim 6, further comprising:
a fifth transistor connected between the first transistor and a driving voltage line; and
a sixth transistor connected between the light emitting element and the first transistor,
wherein the length of the channel of the third transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

### Claim 8 (depends on 7)

The light emitting display device of claim 7, wherein
the length of the channel of the fourth transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

### Claim 9 (depends on 7)

The light emitting display device of claim 7, wherein
the third transistor has a single structure.

### Claim 10 (depends on 9)

The light emitting display device of claim 9, wherein
a width of a channel of the second transistor is in a range of 1 μm to 2 μm, and
a length of the channel of the second transistor is in a range of 1 μm to 2.5 μm.

### Claim 11 (depends on 10)

The light emitting display device of claim 10, wherein
the width of the channel of the second transistor is in a rage of ⅓ to ½ of a width of the channel of the first transistor.

### Claim 12 (depends on 10)

The light emitting display device of claim 10, wherein
the length of the channel of the second transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

### Claim 13 (depends on 1)

The light emitting display device of claim 1, further comprising:
a gate insulating film covering the polycrystalline semiconductor layer,
wherein the gate insulating film is defined by one of a single layer of a silicon oxide film and a double layer of a silicon nitride film and the silicon oxide film,
wherein the gate insulating film has a thickness value in a range of 800 Å to 1200 Å,
wherein the thickness value of the gate insulating film is a thickness of the single layer of the silicon oxide film or a converted thickness of the double layer of the silicon nitride film and the silicon oxide film to the thickness of the single layer of the silicon oxide film.

### Claim 14 (depends on 1)

The light emitting display device of claim 1, wherein
the light emitting display device is driven even at a low frequency of 60 Hz or less.