# US 12,225,709 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 12,225,709 B2
- Document ID: US12225709B2
- Status: Granted
- Kind: B2
- Application number: 18/582,672
- Filed: 2024-02-21
- Published: 2024-06-13
- Granted: 2025-02-11
- Earliest claimed: 2021-12-30
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Chung-Lin Huang
- Web page: https://patentgrep.com/patent/US12225709B2

## CPC

- H10B 12/053: {the transistor being at least partially in a trench in the substrate (vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383)}
- H10B 12/488: {Word lines}
- H10B 12/34: {the transistor being at least partially in a trench in the substrate}
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A manufacturing method of a semiconductor device includes forming an opening in a substrate, implanting a dopant in the substrate from a sidewall of the opening such that a doping region is formed in the substrate at the sidewall of the opening, filling a dielectric material in the opening to form a first dielectric structure after implanting the dopant in the substrate from the sidewall of the opening, and forming a passing word line in the dielectric structure.

## Claims

### Claim 1

A manufacturing method of a semiconductor device, comprising:
forming an opening in a substrate;
implanting a dopant in the substrate from a sidewall of the opening such that a doping region is formed in the substrate at the sidewall of the opening;
after implanting the dopant in the substrate from the sidewall of the opening, filling a dielectric material in the opening to form a first dielectric structure, such that the doping region is in direct contact with the sidewall of the first dielectric structure; and
forming a passing word line in the first dielectric structure.

### Claim 2 (depends on 1)

The method of claim 1, wherein implanting the dopant in the substrate from the sidewall of the opening comprises:
implanting the dopant at a bottom portion of the opening.

### Claim 3 (depends on 1)

The method of claim 1, wherein implanting the dopant in the substrate from the sidewall of the opening comprises:
implanting the dopant in the substrate from the sidewall of the opening at a tilt angle with respect to a top surface of the substrate.

### Claim 4 (depends on 3)

The method of claim 3, wherein implanting the dopant in the substrate from the sidewall of the opening at the tilt angle comprises:
implanting the dopant from a first side of the opening at a first tilt angle; and
implanting the dopant from a second side of the opening at a second tilt angle, wherein the second side of the opening is opposite to the first side of the opening.

### Claim 5 (depends on 3)

The method of claim 3, wherein the tilt angle is in a range from 5° to 20°.

### Claim 6 (depends on 1)

The method of claim 1, wherein the dopant comprises a p-type dopant.

### Claim 7 (depends on 1)

The method of claim 1, further comprising performing an annealing process after implanting the dopant along the sidewall of the opening.

### Claim 8 (depends on 1)

The method of claim 1, further comprising forming a doped active region in the substrate before implanting the dopant in the substrate from the sidewall of the opening such that the doping region is partially formed in the doped active region.

### Claim 9 (depends on 8)

The method of claim 8, wherein a dose of the dopant for the doping region is lower than a dose of a dopant for forming the doped active region.

### Claim 10 (depends on 1)

The method of claim 1, wherein implanting the dopant in the substrate from the sidewall of the opening is performed at an implant energy in a range from about 1 keV to about 5 keV.

### Claim 11 (depends on 1)

The method of claim 1, further comprising:
forming a second dielectric structure during forming the first dielectric structure, wherein the second dielectric structure is adjacent to the first dielectric structure and a size of the second dielectric structure is smaller than the first dielectric structure; and
forming an active word line in the second dielectric structure during forming the passing word line.

### Claim 12 (depends on 1)

The method of claim 1, further comprising:
forming a dielectric layer over the passing word line after forming the passing word line in the first dielectric structure.

### Claim 13

A semiconductor device, comprising:
a substrate comprising a doped active region;
a first dielectric structure in the substrate;
a passing word line in the first dielectric structure;
an active word line in the doped active region of the substrate and is adjacent to the passing word line; and
a doping region in the substrate and in contact with a sidewall of the first dielectric structure, wherein the doping region is at a bottom of the sidewall of the first dielectric structure and between the active word line and the first dielectric structure, and wherein the doping region and the doped active region have the same conductivity type.

### Claim 14 (depends on 13)

The semiconductor device of claim 13, wherein the doped active region is at a top of the sidewall of the first dielectric structure.

### Claim 15 (depends on 13)

The semiconductor device of claim 13, wherein the doping region has a dopant concentration higher than a dopant concentration of the doped active region.

### Claim 16 (depends on 13)

The semiconductor device of claim 13, wherein the active word line is directly in contact with the substrate.

### Claim 17 (depends on 13)

The semiconductor device of claim 13, further comprising a second dielectric structure between the substrate and the active word line, wherein a size of the second dielectric structure is smaller than the first dielectric structure.

### Claim 18 (depends on 17)

The semiconductor device of claim 17, wherein the doping region is separated from the second dielectric structure by the doped active region.

### Claim 19 (depends on 13)

The semiconductor device of claim 13, wherein the doping region has a thickness extending from the sidewall of the first dielectric structure, and the thickness is in a range from about 1 nm to about 10 nm.