# US 12,225,286 B2 · Low power sensor, processor, and data processing system including the sensor and the processor

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- Number: US 12,225,286 B2
- Document ID: US12225286B2
- Status: Granted
- Kind: B2
- Application number: 17/730,616
- Filed: 2022-04-27
- Published: 2022-11-03
- Granted: 2025-02-11
- Earliest claimed: 2021-04-30
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sooyong Kim; Dongook Chung; Junho Huh
- Web page: https://patentgrep.com/patent/US12225286B2

## CPC

- H04N 23/651: {for reducing power consumption by affecting camera operations, e.g. sleep mode, hibernation mode or power off of selective parts of the camera}
- H04N 23/665: {involving internal camera communication with the image sensor, e.g. synchronising or multiplexing SSIS control signals}
- G06T 7/20: Analysis of motion (motion estimation for coding, decoding, compressing or decompressing digital video signals H04N19/43, H04N19/51)
- H04N 23/45: for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images
- H04N 23/611: where the recognised objects include parts of the human body
- H04N 23/65: Control of camera operation in relation to power supply
- H04N 23/667: Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
- H04N 23/6811: {based on the image signal}
- G06T 2207/30201: Face
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

A sensor includes a control circuit set to a first operation mode in which an operation is prepared by receiving a clock signal from a processor and receiving an operation command from the processor. The sensor is configured to generate a first signal including a result of an operation corresponding to the operation command and a second signal indicating completion of the operation. An interface circuit is configured to transmit the first signal and the second signal to the processor. The control circuit is set to a second operation mode due to blocking of the clock signal by a control of the processor in response to the transmission of the second signal.

## Claims

### Claim 1

A sensor comprising:
a processor;
a control circuit configured to be set to a first operation mode in which an operation is prepared by receiving a clock signal and an operation command from the processor, wherein the control circuit is configured to generate a first signal including a result of an operation corresponding to the operation command, and a second signal indicating completion of the operation; and
an interface circuit configured to transmit the first signal and the second signal to the processor, wherein
the control circuit is further configured to be set to a second operation mode due to not receiving the clock signal, which is discontinued by control of the processor in response to a transmission of the second signal and
wherein, after receipt of the second signal, the processor is configured to evaluate, based on the first signal, whether a motion of an object has been detected.

### Claim 2 (depends on 1)

The sensor of claim 1, wherein:
the interface circuit receives a motion detection command from the processor, and
the control circuit, in response to the motion detection command, generates first status information indicating whether the motion detection operation is completed.

### Claim 3 (depends on 2)

The sensor of claim 2, wherein the interface circuit:
transmits the second signal to the processor, and
transmits the first status information to the processor in response to a request of the processor, after transmission of the second signal.

### Claim 4 (depends on 2)

The sensor of claim 2, wherein the interface circuit further comprises a face detection circuit that:
when the motion of the object has been detected, receives a face detection command from the processor, and
in response to the face detection command, detects a face of the object and generates second status information indicating whether the face has been detected.

### Claim 5 (depends on 4)

The sensor of claim 4, wherein the interface circuit:
transmits the second signal to the processor, and
transmits the second status information to the processor in response to a request of the processor, after transmission of the second signal.

### Claim 6 (depends on 2)

The sensor of claim 2, wherein:
when the motion of the object has been detected, the interface circuit receives a face detection command from the processor, and
the control circuit generates image data of the object in response to the face detection command.

### Claim 7 (depends on 1)

The sensor of claim 1, wherein the interface circuit comprises: a first interface circuit configured to transmit the first signal to the processor; and
a second interface circuit configured to transmit the second signal to the processor.

### Claim 8 (depends on 7)

The sensor of claim 7, wherein the second signal comprises an interrupt signal.

### Claim 9 (depends on 7)

The sensor of claim 7, wherein the second interface circuit comprises a general-purpose input/output (GPIO) pin.

### Claim 10 (depends on 1)

The sensor of claim 1, wherein the control circuit is set to the first operation mode in response to receiving a power signal and the clock signal and is set to a third operation mode in response to not receiving the power signal and the clock signal.

### Claim 11 (depends on 1)

The sensor of claim 1, wherein the sensor comprises an image sensor configured to generate image data based on an optical signal incident from outside.
