# US 12,225,220 B2 · Encoder, decoder, and medium > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,225,220 B2 - Document ID: US12225220B2 - Status: Granted - Kind: B2 - Application number: 17/684,657 - Filed: 2022-03-02 - Published: 2022-06-16 - Granted: 2025-02-11 - Earliest claimed: 2019-09-27 - Assignees: Panasonic Intellectual Property Corporation of America - Applicants: Panasonic Intellectual Property Corporation of America - Inventors: Kiyofumi Abe; Takahiro Nishi; Tadamasa Toma; Yusuke Kato - Web page: https://patentgrep.com/patent/US12225220B2 ## CPC - H04N 19/119: Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks - H04N 19/423: characterised by memory arrangements (H04N19/433 takes precedence) - H04N 19/105: Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction - H04N 19/107: between spatial and temporal predictive coding, e.g. picture refresh - H04N 19/109: among a plurality of temporal predictive coding modes - H04N 19/11: among a plurality of spatial predictive coding modes - H04N 19/117: Filters, e.g. for pre-processing or post-processing (sub-band filter banks H04N19/635) - H04N 19/12: Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264 - H04N 19/124: Quantisation - H04N 19/13: Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC] - H04N 19/159: Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction - H04N 19/176: the region being a block, e.g. a macroblock - H04N 19/182: the unit being a pixel - H04N 19/186: the unit being a colour or a chrominance component - H04N 19/52: by predictive encoding - H04N 19/533: Motion estimation using multistep search, e.g. two-dimensional [2D]-log search or one-at-a-time search [OTS] - H04N 19/537: Motion estimation other than block-based - H04N 19/583: Motion compensation with overlapping blocks - H04N 19/70: characterised by syntax aspects related to video coding, e.g. related to compression standards - H04N 19/82: involving filtering within a prediction loop - H04N 19/86: involving reduction of coding artifacts, e.g. of blockiness - H04N 19/129: Scanning of coding units, e.g. zig-zag scan of transform coefficients or flexible macroblock ordering [FMO] - H04N 19/30: using hierarchical techniques, e.g. scalability (H04N19/63 takes precedence) - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines one or more tiles included in a picture and one or more subpictures included in the picture, according to a constraint condition that each tile of the one or more tiles includes at least one subpicture of the one or more subpictures entirely and the each tile does not include another subpicture of the one or more subpictures partially. ## Claims ### Claim 1 An encoder comprising: circuitry; and memory coupled to the circuitry, wherein, in operation, the circuitry: encodes a position and a shape of a region of each of a plurality of subpictures included in a picture, the plurality of subpictures being determined according to a constraint condition that: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures. ### Claim 2 A decoder comprising: circuitry; and memory coupled to the circuitry, wherein, in operation, the circuitry: decodes a position and a shape of a region of each of a plurality of subpictures included in a picture, the plurality of subpictures being determined according to a constraint condition: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures. ### Claim 3 A non-transitory computer readable medium storing executable instructions and a bitstream including information indicating whether a plurality of subpictures are included in a picture, the executable instructions causing a decoder to perform a decoding process comprising: decoding a position and a shape of a region of each of the plurality of subpictures, the plurality of subpictures being determined according to a constraint condition that: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures.