# US 12,224,773 B2 · Circuitry for encoding a bus signal and associated methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,773 B2 - Document ID: US12224773B2 - Status: Granted - Kind: B2 - Application number: 18/055,288 - Filed: 2022-11-14 - Published: 2023-06-08 - Granted: 2025-02-11 - Earliest claimed: 2021-12-06 - Assignees: NXP B.V. - Applicants: NXP B.V. - Inventors: Clemens Gerhardus Johannes de Haas; Rigor Hendrikus Lambertus van der Heijden - Web page: https://patentgrep.com/patent/US12224773B2 ## CPC - H03K 5/04: by increasing duration; by decreasing duration - H03M 5/12: Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code - H03K 5/156: Arrangements in which a continuous pulse train is transformed into a train having a desired pattern - H04L 25/4902: {Pulse width modulation; Pulse position modulation} - H04L 25/493: by transition coding, i.e. the time-position or direction of a transition being encoded before transmission - H04L 12/40: Bus networks - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract An apparatus comprising an encoder is configured to: detect a first edge in the input signal and, in response, provide a pulse generation sequence comprising the encoder being configured to: generate, in the output signal, a first pulse, wherein the first pulse is provided over first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and obtain a first sample of the input signal; and obtain a second sample at an end of the first pulse; and if the first sample and the second sample are indicative of different voltage levels, generate a second pulse; or if the first and second sample and the same maintain the voltage level in the output signal. ## Claims ### Claim 1 An apparatus comprising: an input terminal for receiving an input signal indicative of signalling from a network, the input signal comprising at least a two level signal that comprises either a first voltage level or a second voltage level, an encoder configured to encode the input signal into an output signal and an output terminal for outputting the output signal, wherein the encoder is configured to: detect a first edge in the input signal; in response to the detection of the first edge provide a pulse generation sequence comprising the encoder being configured to: generate, in the output signal, a first pulse, the first pulse comprising a first ramp portion in which the voltage level is changed from a first-pulse level to a second-pulse level, a first hold portion in which the second-pulse level is maintained, a second ramp portion in which the voltage level is changed from the second-pulse level to the first-pulse level and a second hold portion in which the first-pulse level is maintained, and wherein the first ramp portion and the first hold portion are provided at least over a first predetermined minimum time period and wherein the second ramp portion and the second hold portion are provided at least over a second predetermined minimum time period, and wherein the first pulse is provided over the first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and sample the input signal to obtain a first sample indicative of a voltage level of the input signal to which the input signal transitions following said detection of the first edge and store said first sample; and sample the input signal a second time within a time window between the end of the first hold portion and an end of the first pulse to obtain a second sample indicative of a voltage level of the input signal and store said second sample; and if the first sample and the second sample are indicative of different voltage levels, then the encoder is configured to generate, in the output signal, a second pulse, the second pulse comprising a first ramp portion in which the voltage level is changed from the first-pulse level to the second-pulse level, a first hold portion in which the second-pulse level is maintained, a second ramp portion in which the voltage level is changed from the second-pulse level to the first-pulse level and a second hold portion in which the first-pulse level is maintained, and wherein the first ramp portion and the first hold portion are provided at least over a third predetermined minimum time period and wherein the second ramp portion and the second hold portion are provided at least over a fourth predetermined minimum time period; or if the first sample and the second sample are indicative of the same voltage levels, then the encoder is configured to maintain the voltage level in the output signal at the first-pulse level. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the input signal is encoded with Differential Manchester Encoding. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the encoder is configured to maintain the voltage level in the output signal at the first-pulse level in response to the first sample and the second sample being indicative of the same voltage levels, until the encoder detects a second edge in the input signal. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the encoder is configured to detect a second edge in the input signal that follows said second pulse or that follows the maintenance of the voltage level in the output signal at the first-pulse level; and in response to the detection of the second edge, provide said pulse generation sequence. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the sum of the first and second predetermined minimum time periods is equal to the sum of the third and fourth predetermined minimum time periods. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein: the first predetermined minimum time period is equal to the second predetermined minimum time period. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein: the third predetermined minimum time period is equal to the fourth predetermined minimum time period. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein: the sum of the first and second predetermined minimum time periods is greater than a quarter of the bit time of the input signal. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein: the sum of the third and fourth predetermined minimum time periods is greater than a quarter of the bit time of the input signal. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the second sample of the input signal at the second time is within a time window between half a bit time of the input signal after the detection of the first edge and the end of the first pulse. ### Claim 11 (depends on 1) The apparatus of claim 1, wherein said network comprises an Ethernet network and said apparatus comprises part of a transceiver for coupling to said Ethernet network. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein the transceiver comprises an Ethernet 10BASE-T1S transceiver. ### Claim 13 (depends on 1) The apparatus of claim 1, wherein the encoder comprises a first flipflop configured to detect rising edges in said input signal and a second flipflop configured to detect falling edges in said input signal, wherein in response to detection of either of a rising edge or a falling edge, one of the respective first and second flipflops is configured to provide for initiation of said pulse generation sequence and, while said pulse generation sequence is ongoing, provide a signal to the other of the first and second flipflop modules to inhibit initiation of a further pulse generation sequence. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the pulse generation sequence is provided by a predetermined sequence of signalling output by a respective finite state machine which is configured to be triggered by a respective one of said first flipflop and said second flipflop. ### Claim 15 (depends on 1) The apparatus of claim 1, wherein the sum of the first and second predetermined minimum time periods is equal to or less than half a bit time of the input signal. ### Claim 16 (depends on 1) The apparatus of claim 1, wherein the sum of the third and fourth predetermined minimum time periods is equal to or less than half a bit time of the input signal. ### Claim 17 (depends on 1) The apparatus of claim 1, wherein the sum of the first and second predetermined minimum time periods is greater than 16 ns. ### Claim 18 (depends on 1) The apparatus of claim 1, wherein the sum of the third and fourth predetermined minimum time periods is greater than 16 ns. ### Claim 19 (depends on 1) A combination of a transceiver that includes the apparatus of claim 1 and a microcontroller, wherein the transceiver is configured to couple to a network to receive differential signalling from the network and generate an input signal comprising a difference between the parts of the differential signalling, wherein the transceiver receives the input signal and generates the output signal, wherein said microcontroller is configured to receive said output signal and includes a decoder configured to decode the output signal to provide a bitstream for an Ethernet physical layer module of the microcontroller indicative of the voltage levels in the input signal. ### Claim 20 A method for encoding an input signal into an output signal, wherein the input signal is indicative of signalling from a network and comprises at least a two-level signal that comprises either a first voltage level or a second voltage level, the method comprising, by an encoder: detecting a first edge in the input signal; In response to the detection of the first edge providing a pulse generation sequence comprising: generating, in the output signal, a first pulse, the first pulse comprising a first ramp portion in which the voltage level is changed from a first-pulse level to a second-pulse level, a first hold portion in which the second-pulse level is maintained, a second ramp portion in which the voltage level is changed from the second-pulse level to the first-pulse level and a second hold portion in which the first-pulse level is maintained, and wherein the first ramp portion and the first hold portion are provided at least over a first predetermined minimum time period and wherein the second ramp portion and the second hold portion are provided at least over a second predetermined minimum time period, and wherein the first pulse is provided over the first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and sampling the input signal to obtain a first sample indicative of a voltage level of the input signal to which the input signal transitions following said detection of the first edge and store said first sample; and sampling the input signal a second time within a time window between the end of the first hold portion and an end of the first pulse to obtain a second sample indicative of a voltage level of the input signal and store said second sample; and if the first sample and the second sample are indicative of different voltage levels, then generating, in the output signal, a second pulse, the second pulse comprising a first ramp portion in which the voltage level is changed from the first-pulse level to the second-pulse level, a first hold portion in which the second-pulse level is maintained, a second ramp portion in which the voltage level is changed from the second-pulse level to the first-pulse level and a second hold portion in which the first-pulse level is maintained, and wherein the first ramp portion and the first hold portion are provided at least over a third predetermined minimum time period and wherein the second ramp portion and the second hold portion are provided at least over a fourth predetermined minimum time period; or if the first sample and the second sample are indicative of the same voltage levels, then maintaining the voltage level in the output signal at the first-pulse level.