# US 12,224,750 B2 · Topologically protected qubits, processors with topologically protected qubits, and methods for use of topologically protected qubits

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- Number: US 12,224,750 B2
- Document ID: US12224750B2
- Status: Granted
- Kind: B2
- Application number: 17/883,874
- Filed: 2022-08-09
- Published: 2023-11-16
- Granted: 2025-02-11
- Earliest claimed: 2021-09-03
- Assignees: 1372934 B.C. Ltd.
- Applicants: D-Wave Systems Inc.
- Inventors: Mohammad H. Amin; Richard G. Harris
- Web page: https://patentgrep.com/patent/US12224750B2

## CPC

- H03K 19/195: using superconductive devices
- G06N 10/40: Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
- G06N 10/70: Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
- G06N 10/60: Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS

## Abstract

A logical qubit, a quantum processor, and a method of performing an operation on the logical qubit are discussed. The logical qubit includes first and second tunable couplers and a plurality of fixed couplers, with at least one fixed coupler providing four physical qubit interaction. The first and second tunable couplers and the fixed couplers enforce even parity in any connected qubits. The logical qubit has a plurality of physical qubits with qubits connected to the first tunable coupler and a first fixed coupler, qubits connected to the second tunable coupler and a second fixed coupler, and qubits connected between the first fixed coupler and the second fixed coupler. Each fixed coupler is connected to at least two physical qubits and at least two paths connect the first tunable coupler and the second tunable coupler, with one path communicating with a microwave line.

## Claims

### Claim 1

A logical qubit comprising:
a first tunable coupler;
a second tunable coupler;
a plurality of fixed couplers comprising at least a first fixed coupler and a second fixed coupler;
a plurality of physical qubits comprising:
a first set of two or more physical qubits connected to the first tunable coupler, at least one of the physical qubits in the first set of two or more physical qubits connected to the first fixed coupler;
a second set of two or more physical qubits connected to the second tunable coupler, at least one of the physical qubits in the second set of two or more physical qubits connected to the second fixed coupler; and
a third set of two or more physical qubits connected between the first fixed coupler and the second fixed coupler; and
wherein:
each of the first tunable coupler, the plurality of fixed couplers, and the second tunable coupler enforce one of even and odd parity in any connected physical qubits of the plurality of physical qubits;
each coupler in the plurality of fixed couplers is connected to at least two physical qubits in the plurality of physical qubits, at least one coupler of the plurality of fixed couplers is in communication with four physical qubits to provide interaction between the four physical qubits;
at least two discrete qubit paths connect the first tunable coupler and the second tunable coupler; and
the first tunable coupler, the second tunable coupler, the plurality of fixed couplers, and the plurality of physical qubits define a lattice.

### Claim 2 (depends on 1)

The logical qubit of claim 1, wherein each of the first tunable coupler and the second tunable coupler are connected to an external qubit, the external qubit comprising an additional physical qubit connected on an outer perimeter of the lattice.

### Claim 3 (depends on 2)

The logical qubit of claim 2, wherein each external qubit is in communication with one or more additional logical qubits.

### Claim 4 (depends on 1)

The logical qubit of claim 1, wherein the plurality of physical qubits comprise pairs of qubits arranged in loops made up of two physical qubits of the plurality of physical qubits, the pairs of qubits coupled by two couplers of the first tunable coupler, the second tunable coupler, and the plurality of fixed couplers.

### Claim 5 (depends on 4)

The logical qubit of claim 4, wherein the plurality of fixed couplers are each respective four qubit parity enforcers, and the first tunable coupler and the second tunable coupler are each respective switchable three qubit parity enforcers.

### Claim 6 (depends on 1)

The logical qubit of claim 1, wherein the plurality of physical qubits comprises twenty four physical qubits arranged in a three-by-three square lattice.

### Claim 7 (depends on 6)

The logical qubit of claim 6, wherein the first and the second tunable couplers are positioned on diagonally opposite corners of the three-by-three square lattice.

### Claim 8 (depends on 6)

The logical qubit of claim 6, wherein the first and the second tunable couplers are positioned on first and second exterior sides of the three-by-three square lattice.

### Claim 9 (depends on 6)

The logical qubit of claim 6, wherein the first and the second tunable couplers are positioned on an interior of the three-by-three square lattice.

### Claim 10 (depends on 1)

The logical qubit of claim 1, further comprising a control signal source coupled to apply a control signal to change a state of one or more physical qubits that make up one of the at least two discrete qubit paths.

### Claim 11 (depends on 10)

The logical qubit of claim 10, wherein the control signal source comprises a microwave line.

### Claim 12

A quantum processor comprising a plurality of logical qubits, each logical qubit comprising:
a first tunable coupler;
a second tunable coupler;
a plurality of fixed couplers comprising at least a first fixed coupler and a second fixed coupler;
a plurality of physical qubits comprising:
a first set of two or more physical qubits connected to the first tunable coupler, at least one of the physical qubits in the first set of two or more physical qubits connected to the first fixed coupler;
a second set of two or more physical qubits connected to the second tunable coupler, at least one of the physical qubits in the second set of two or more physical qubits connected to the second fixed coupler; and
a third set of two or more physical qubits connected between the first fixed coupler and the second fixed coupler;
wherein:
each of the first tunable coupler, the plurality of fixed couplers, and the second tunable coupler enforce parity in any connected physical qubits;
each coupler in the plurality of fixed couplers is connected to at least two physical qubits in the plurality of physical qubits, at least one coupler of the plurality of fixed couplers is in communication with four physical qubits and providing interaction between the four physical qubits;
wherein at least two discrete qubit paths connect the first tunable coupler and the second tunable coupler;
the first tunable coupler, the second tunable coupler, the plurality of fixed couplers, and the plurality of physical qubits define a lattice; and
each logical qubit of the plurality of logical qubits is communicatively coupled to at least one other logical qubit of the plurality of logical qubits.

### Claim 13 (depends on 12)

The quantum processor of claim 12, wherein coupled logical qubits are connected by two physical qubits and an intermediate coupler.

### Claim 14 (depends on 12)

The quantum processor of claim 12, wherein coupled logical qubits are connected by one shared physical qubit.

### Claim 15 (depends on 12)

The quantum processor of claim 12, wherein coupled logical qubits are directly coupled with a tunable four qubit coupler by sharing a tunable coupler.

### Claim 16 (depends on 12)

The quantum processor of claim 12, wherein multiple logical qubits are coupled by physical qubits connected to an intermediate coupler.

### Claim 17 (depends on 12)

The quantum processor of claim 12, wherein four logical qubits are coupled by four external qubits and an intermediate tunable four qubit coupler, each external qubit comprising an additional physical qubit connected on an outer perimeter of the lattice.

### Claim 18 (depends on 12)

The quantum processor of claim 12, wherein four logical qubits are coupled by a single shared physical qubit.

### Claim 19 (depends on 12)

The quantum processor of claim 12, further comprising a control signal source communicatively coupled to change a state of one or more physical qubits in communication with one of the at least two discrete qubit paths.

### Claim 20 (depends on 19)

The quantum processor of claim 19, wherein the control signal source comprises a microwave line.