Fast-transient buffer

A fast-transient buffer, comprising:

• a flipped voltage follower and a bias circuit coupled to the flipped voltage follower, wherein the flipped voltage follower is coupled between an input terminal and an output terminal of the fast-transient buffer;
• and
• a first MOS transistor, coupled to the flipped voltage follower as well as the output terminal of the fast-transient buffer, wherein the first MOS transistor regulates an output voltage of the output terminal of the fast-transient buffer, in an opposite direction in comparison with an output voltage regulation direction due to the flipped voltage follower;
• wherein:
• the first MOS transistor has a drain terminal coupled to the output terminal of the fast-transient buffer,
• the flipped voltage follower has a second MOS transistor, a third MOS transistor, and a fourth MOS transistor;
• the second MOS transistor has a gate terminal coupled to the input terminal of the fast-transient buffer, a source terminal coupled to the output terminal of the fast-transient buffer, and a drain terminal coupled to a gate terminal of the first MOS transistor;
• the third MOS transistor has a drain terminal coupled to the source terminal of the second MOS transistor;
• the fourth MOS transistor has a source terminal coupled to the drain terminal of the second MOS transistor, and a drain terminal coupled to the gate terminal of the third MOS transistor;
• and
• the bias circuit is coupled to a gate terminal of the fourth MOS transistor to further bias the first MOS transistor through the fourth MOS transistor.