# US 12,224,710 B2 · Low power crystal oscillator

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- Number: US 12,224,710 B2
- Document ID: US12224710B2
- Status: Granted
- Kind: B2
- Application number: 18/463,212
- Filed: 2023-09-07
- Published: 2023-12-28
- Granted: 2025-02-11
- Earliest claimed: 2021-09-20
- Assignees: STMicroelectronics International N.V.
- Applicants: STMicroelectronics International N.V.
- Inventors: Anand Kumar; Nitin Jain
- Web page: https://patentgrep.com/patent/US12224710B2

## CPC

- H03B 5/364: {the amplifier comprising field effect transistors (H03B5/366 takes precedence)}
- H03B 5/06: Modifications of generator to ensure starting of oscillations
- H03B 5/366: {and comprising means for varying the frequency by a variable voltage or current}
- H03B 2200/0082: Lowering the supply voltage and saving power
- H03B 2200/0094: Measures to ensure starting of oscillations
- H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H)

## Abstract

A low power crystal oscillator circuit having a high power part and a low power part. Oscillation is initialized using the high power part. Once the crystal is under stable oscillation, the circuit switches to the low power part and continue operation for a long duration.

## Claims

### Claim 1

A method for operating a low power crystal oscillator circuit, comprising:
sending a startup signal of a first polarity to a startup terminal of a crystal oscillator circuit having an output terminal and a first current supply;
driving the crystal oscillator circuit with current of a first amperage through a first current mirror having first and second current mirror transistors, the first current mirror being coupled between a high power supply and a low power supply, the crystal oscillator circuit configured to output a first voltage value at the output terminal in response to the first amperage, the startup terminal being coupled to the output terminal and to a terminal of a first startup transistor, the crystal oscillator circuit including a second current supply coupled to the low power supply and a third current mirror transistor;
maintaining the startup signal of the first polarity at the startup terminal for a first period time;
reversing the first polarity of the startup signal on the startup terminal to cause the first current mirror to turn off and cease to draw current;
driving the crystal oscillator circuit with current of a second amperage through the first current mirror; and
drawing current of the second amperage value from the first current supply which is J times less than the first amperage and the crystal oscillator circuit outputs voltage of a second voltage value which is K times less than the first voltage value at the output terminal.

### Claim 2 (depends on 1)

The method for operating the low power crystal oscillator circuit of claim 1 wherein the value J is greater than 2.

### Claim 3 (depends on 1)

The method for operating the low power crystal oscillator circuit of claim 1 wherein the value K is greater than 2.

### Claim 4 (depends on 1)

The method for operating the low power crystal oscillator circuit of claim 1 wherein the product of J and K is greater than 10.

### Claim 5 (depends on 1)

The method for operating the low power crystal oscillator circuit of claim 1 wherein the first time value is greater than 0 microseconds and less than 20 microseconds.

### Claim 6

A method, comprising:
coupling a first capacitor to a crystal and a low power supply;
coupling a first current mirror transistor to a high power supply;
coupling a first current source to the first current mirror transistor;
coupling the first current source to the low power supply;
coupling a second current mirror transistor to the high power supply and the first current mirror transistor;
coupling a first startup control transistor to the second current mirror transistor and the crystal;
coupling a third current mirror transistor to the high power supply;
coupling a second current source to the third current mirror transistor and to the low power supply;
coupling a fourth current mirror transistor to the high power supply and the third current mirror transistor;
coupling a second startup control transistor to the fourth current mirror transistor and to the crystal; and
coupling a third capacitor to the third and fourth current mirror transistors and to the crystal.

### Claim 7 (depends on 6)

The method of claim 6 wherein the first current mirror transistor has a channel with a first width to length ratio and the second current mirror transistor has a second width to length ratio that is X times greater than the first width to length ratio.

### Claim 8 (depends on 7)

The method of claim 7 wherein the third current mirror transistor has a third width to length ratio.

### Claim 9 (depends on 8)

The method of claim 8 wherein a first current value of the first current mirror is greater than a second current value of the second current mirror.

### Claim 10 (depends on 9)

The method of claim 9 wherein the fourth current mirror transistor has a fourth width to length ratio that is Y times greater than the third width to length ratio.

### Claim 11 (depends on 10)

The method of claim 10, comprising:
receiving a startup control signal at the first startup control transistor; and
receiving an inverse startup control signal with the second startup control transistor.

### Claim 12

A method, comprising:
coupling a first capacitor to a crystal and a low power supply;
coupling a first current mirror transistor to a high power supply;
coupling a first current source to the first current mirror transistor and the low power supply;
coupling a second current mirror transistor to the high power supply and the first current mirror transistor;
coupling a first startup control transistor to the second current mirror transistor and the crystal;
coupling a third current mirror transistor to the high power supply;
coupling a second current source to the third current mirror transistor and the low power supply.

### Claim 13 (depends on 12)

The method of claim 12 wherein the first current mirror transistor has a channel with a first width to length ratio, the second current mirror transistor having a second width to length ratio that is X times greater than the first width to length ratio, and the third current mirror transistor having a third width to length ratio.

### Claim 14 (depends on 13)

The method of claim 13, comprising coupling a fourth current mirror transistor to the high power supply.

### Claim 15 (depends on 14)

The method of claim 14 wherein the fourth current mirror transistor has a fourth width to length ratio that is Y times greater than the third width to length ratio.

### Claim 16 (depends on 15)

The method of claim 15, comprising coupling a second startup control transistor to the fourth current mirror transistor.

### Claim 17 (depends on 16)

The method of claim 16 comprising coupling the second startup control transistor to the crystal.

### Claim 18 (depends on 17)

The method of claim 17 comprising coupling a third capacitor to the third and fourth current mirror transistors and the crystal.