# US 12,224,666 B2 · Dc-dc converter control circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,666 B2 - Document ID: US12224666B2 - Status: Granted - Kind: B2 - Application number: 17/748,772 - Filed: 2022-05-19 - Published: 2023-11-23 - Granted: 2025-02-11 - Earliest claimed: 2022-05-19 - Assignees: GlobalFoundries U.S. Inc. - Applicants: GLOBALFOUNDRIES U.S. Inc. - Inventors: Shatabda Saha - Web page: https://patentgrep.com/patent/US12224666B2 ## CPC - H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators - H02M 3/158: including plural semiconductor devices as final control devices for a single load - H02M 1/0009: {Devices or circuits for detecting current in a converter} - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 1/0032: {Control circuits allowing low power mode operation, e.g. in standby mode} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/14: Arrangements for reducing ripples from DC input or output - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract The present disclosure relates to semiconductor structures and, more particularly, to a dc-dc converter control circuit and methods of manufacture. The structure includes a dynamic pulse width modulation (PWM) circuit which converts a sense voltage to a variable current in response to a load current being above a predetermined threshold, and a ramp generator circuit which receives the variable current from the dynamic PWM circuit and dynamically adjusts a fixed base frequency of a PWM signal to a dynamic frequency of the PWM signal which corresponds with the load current. ## Claims ### Claim 1 A structure comprising: a dynamic pulse width modulation (PWM) circuit which converts a sense voltage to a variable current in response to a load current being above a predetermined threshold, wherein the dynamic PWM circuit comprises a comparator that is enabled using an enable signal and the comparator outputs an enable variable current signal, the enable variable current signal and the converted sense voltage being utilized by a voltage-current converter to output the variable current; and a ramp generator circuit which receives the variable current from the dynamic PWM circuit and dynamically adjusts a fixed base frequency of a PWM signal to a dynamic frequency of the PWM signal corresponding with the load current. ### Claim 2 (depends on 1) The structure of claim 1, wherein the dynamic PWM circuit comprises the voltage-current converter which converts a load sensing voltage to the variable current. ### Claim 3 (depends on 2) The structure of claim 2, wherein the comparator receives the load sensing voltage and a voltage equivalent of a minimum load current. ### Claim 4 (depends on 3) The structure of claim 3, wherein the comparator receives the enable signal for enabling the comparator. ### Claim 5 (depends on 2) The structure of claim 2, wherein the dynamic PWM circuit comprises a load current sense circuit which receives the sense voltage and outputs the load sensing voltage. ### Claim 6 (depends on 1) The structure of claim 1, wherein the ramp generator circuit comprises a flip flop circuit which is reset in response to a ramp voltage being greater than a high voltage signal. ### Claim 7 (depends on 6) The structure of claim 6, wherein the ramp generator circuit further comprises an NMOS transistor which is enabled in response to the flip flop circuit being reset. ### Claim 8 (depends on 6) The structure of claim 6, wherein the flip flop circuit is set in response to the ramp voltage falling below a low voltage signal. ### Claim 9 (depends on 1) The structure of claim 1, wherein the ramp generator circuit outputs the fixed base frequency in response to the load current being below the predetermined threshold. ### Claim 10 (depends on 9) The structure of claim 9, wherein the variable current is zero in response to the load current being below the predetermined threshold. ### Claim 11 (depends on 9) The structure of claim 9, wherein the fixed base frequency generates a fixed output voltage ripple in response to the load current being below the predetermined threshold. ### Claim 12 A structure comprising: a dynamic pulse width modulation (PWM) frequency control circuit comprising a voltage-current converter which receives a load sensing voltage and converts the load sensing voltage to a variable current, and a load current sense circuit which receives a sense voltage and outputs the load sensing voltage, the dynamic PWM frequency control circuit further comprising a comparator that is enabled using an enable signal and outputs an enable variable current signal to the voltage-current converter; and a ramp generator circuit which receives the variable current from the dynamic PWM frequency control circuit and outputs a fixed base frequency in response to a load current being below a predetermined threshold, and dynamically adjusts the fixed base frequency of a PWM signal to a dynamic frequency of the PWM signal corresponding with the load current being above the predetermined threshold. ### Claim 13 (depends on 12) The structure of claim 12, wherein the comparator receives the load sensing voltage and a voltage equivalent of a minimum load current. ### Claim 14 (depends on 13) The structure of claim 13, wherein the comparator also receives the enable signal from a start-up detector for enabling the comparator. ### Claim 15 (depends on 12) The structure of claim 12, wherein the ramp generator circuit comprises a flip flop circuit which is reset in response to a ramp voltage being greater than a high voltage signal. ### Claim 16 (depends on 15) The structure of claim 15, wherein the ramp generator circuit further comprises an NMOS transistor which is enabled in response to the flip flop circuit being reset. ### Claim 17 (depends on 15) The structure of claim 15, wherein the flip flop circuit is set in response to the ramp voltage falling below a low voltage signal. ### Claim 18 (depends on 12) The structure of claim 12, wherein the variable current is zero in response to the load current being below the predetermined threshold. ### Claim 19 (depends on 12) The structure of claim 12, wherein the fixed base frequency generates a fixed output voltage ripple in response to the load current being below the predetermined threshold. ### Claim 20 A method comprising: receiving an enable signal; determining that a load current is above a predetermined threshold; receiving the enable variable current signal and a sense voltage and converting the sense voltage and the enable variable current signal to a variable current in response to the load current being above the predetermined threshold, the enable variable current signal and the converted sense voltage being utilized by a voltage-current converter to output the variable current; and dynamically adjusting a fixed base frequency of a PWM signal to a dynamic frequency of the PWM signal based on the variable current corresponding to the load current.