# US 12,224,654 B2 · Pulse receiving circuit and signal transmission device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,654 B2 - Document ID: US12224654B2 - Status: Granted - Kind: B2 - Application number: 17/917,661 - Filed: 2021-04-06 - Published: 2023-05-18 - Granted: 2025-02-11 - Earliest claimed: 2020-04-24 - Assignees: Rohm Co., Ltd. - Applicants: Rohm Co., Ltd. - Inventors: Tsuyoshi Fukura; Daiki Yanagishima; Akio Sasabe - Web page: https://patentgrep.com/patent/US12224654B2 ## CPC - H02M 1/0006: {Arrangements for supplying an adequate voltage to the control circuit of converters} - H01F 19/08: Transformers having magnetic bias, e.g. for handling pulses - H01F 27/2804: {Printed windings} - H01F 38/50: {Transformers for galvanic isolation} - H02M 1/0064: {Magnetic structures combining different functions, e.g. storage, filtering or transformation} - H02M 3/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections} - H03K 19/0175: Coupling arrangements; Interface arrangements (interface arrangements for digital computers G06F3/00, G06F13/00) - H04L 25/0266: {Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/44: Circuits or arrangements for compensating for electromagnetic interference in converters or inverters - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A pulse receiving circuit constituting a signal transmission device includes a first pulse detector that receives a differential input between a first reception pulse signal, i.e. an internal signal at a secondary winding of a first transformer and a second reception pulse signal, i.e. an internal signal at a secondary winding of a second transformer; a second pulse detector that receives the differential input between the first reception pulse signal and the second reception pulse signal with input polarity reversed to that of the first pulse detector; and a logic unit that generates a reception pulse signal based on output signals of the first and second pulse detectors, respectively. ## Claims ### Claim 1 A pulse receiving circuit comprising: a first pulse detector arranged to receive a differential input between a first reception pulse signal at a secondary winding of a first transformer and a second reception pulse signal at a secondary winding of a second transformer; a second pulse detector arranged to receive the differential input between the first reception pulse signal and the second reception pulse signal with input polarity reversed to that of the first pulse detector; a logic unit arranged to generate a reception pulse signal based on output signals of the first pulse detector and the second pulse detector; a first switch and a second switch connected between both ends of the secondary windings of the first transformer and the second transformer, respectively; and a timer to turn on the first switch and the second switch for a predetermined masking period from pulse detection timings of the first pulse detector and the second pulse detector, respectively. ### Claim 2 (depends on 1) The pulse receiving circuit according to claim 1, wherein the first pulse detector and the second pulse detector are each a comparator having an input offset. ### Claim 3 (depends on 1) The pulse receiving circuit according to claim 1, further comprising a first electrostatic protection element and a second electrostatic protection element connected between both ends of the secondary windings of the first transformer and the second transformer, respectively. ### Claim 4 (depends on 1) The pulse receiving circuit according to claim 1, wherein the logic unit sets the reception pulse signal to a first logic level according to the first reception pulse signal, and sets the reception pulse signal to a second logic level according to the second reception pulse signal. ### Claim 5 (depends on 1) A signal transmission device comprising: a pulse transmission circuit arranged to generate a first transmission pulse signal and a second transmission pulse signal according to an input pulse signal; a first transformer and a second transformer arranged to isolate between input and output and to respectively transmit the first transmission pulse signal and the second transmission pulse signal as a first reception pulse signal and a second reception pulse signal to poststage; the pulse receiving circuit according to claim 1, arranged to generate the reception pulse signal according to the first reception pulse signal and the second reception pulse signal; and a driver arranged to generate an output pulse signal according to the reception pulse signal. ### Claim 6 (depends on 5) The signal transmission device according to claim 5, wherein the pulse transmission circuit performs pulse drive of either one of the first transmission pulse signal and the second transmission pulse signal according to a logic level of the input pulse signal. ### Claim 7 (depends on 5) The signal transmission device according to claim 5, wherein the pulse transmission circuit is integrated in a first chip, the pulse receiving circuit and the driver are integrated in a second chip, and the first transformer and the second transformer are integrated in a third chip. ### Claim 8 (depends on 7) The signal transmission device according to claim 7, wherein the third chip is provided with: a first terminal connected to a first terminal of a primary winding forming the first transformer; a second terminal connected to a second terminal of a primary winding forming the first transformer and a first terminal of a primary winding forming the second transformer; a third terminal connected to a second terminal of a primary winding forming the second transformer; a fourth terminal connected to a first terminal of a secondary winding forming the first transformer; a fifth terminal connected to a second terminal of the secondary winding forming the first transformer and a first terminal of a secondary winding forming the second transformer; and a sixth terminal connected to a second terminal of the secondary winding forming the second transformer. ### Claim 9 (depends on 5) The signal transmission device according to claim 5, comprising a plurality of sets of the first transformer and the second transformer. ### Claim 10 A signal transmission device comprising: a pulse transmission circuit arranged to generate a first transmission pulse signal and a second transmission pulse signal according to an input pulse signal; a first transformer and a second transformer arranged to isolate between input and output and to respectively transmit the first transmission pulse signal and the second transmission pulse signal as a first reception pulse signal and a second reception pulse signal to poststage; a pulse receiving circuit arranged to generate a reception pulse signal according to the first reception pulse signal and the second reception pulse signal; and a driver arranged to generate an output pulse signal according to the reception pulse signal, wherein the pulse receiving circuit comprises: a first pulse detector arranged to receive a differential input between the first reception pulse signal at a secondary winding of the first transformer and the second reception pulse signal at a secondary winding of the second transformer; a second pulse detector arranged to receive the differential input between the first reception pulse signal and the second reception pulse signal with input polarity reversed to that of the first pulse detector; and a logic unit arranged to generate the reception pulse signal based on output signals of the first pulse detector and the second pulse detector.