# US 12,224,574 B2 · Device and method for compliance testing of power supply adapters of information handling systems

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- Number: US 12,224,574 B2
- Document ID: US12224574B2
- Status: Granted
- Kind: B2
- Application number: 17/510,445
- Filed: 2021-10-26
- Published: 2023-04-27
- Granted: 2025-02-11
- Earliest claimed: 2021-10-26
- Assignees: Dell Products L.P.
- Applicants: Dell Products L.P.
- Inventors: Wei Cheng Yu; Merle Jackson Wood, III; Geroncio Ong Tan; Chi Che Wu
- Web page: https://patentgrep.com/patent/US12224574B2

## CPC

- H02H 3/20: responsive to excess voltage
- G01R 31/40: Testing power supplies (testing photovoltaic devices H02S50/10)
- H02H 1/0007: {concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445)}
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

Described are computer implemented methods, a system and a power supply amplifier (PSA) that supports compliance testing of the PSA. The power supplies power to a powered device/information handling system. A voltage of synchronous rectifier (SR) gate is measured and compared to a calculated sense voltage at a sense resistor of the PSA. If the sense voltage is zero, received current of the PSA bypasses a first blocking MOSFET and a second blocking MOSFET for over voltage protection. If the sense voltage is not zero, the received current passes through the first blocking MOSFET.

## Claims

### Claim 1

A computer-implementable method for compliance testing of a power supply adapter (PSA) to a powered device (PD) comprising:
measuring a voltage at synchronous rectifier (SR) gate of the PSA, where the SR gate receives current from a main converter of the PSA;
measuring a sense current at a sense resistor wherein the sense current follows from the SR gate;
calculating a sense voltage based on the measured sense current and value of sense resistor;
if sense voltage is zero, bypassing received current of the PSA at a first blocking MOSFET, and using a second blocking MOSFET for over voltage protection and passing the received current to an output of the PSA; and
if the sense voltage is not zero, passing the received current through the first blocking MOSFET.

### Claim 2 (depends on 1)

The computer-implementable method of claim 1, wherein a LPS detection circuit monitors the voltage at the SR gate.

### Claim 3 (depends on 1)

The computer-implementable method of claim 1, wherein a PD controller performs the measuring of the sense current.

### Claim 4 (depends on 1)

The computer-implementable method of claim 1, wherein a PD integrated circuit (IC) detects loading of the sense current, wherein loading condition determines if PSA remains operational.

### Claim 5 (depends on 1)

The computer-implementable method of claim 1, wherein a PD integrated circuit (IC) sets a threshold point as to load of the PSA.

### Claim 6 (depends on 1)

The computer-implementable method of claim 1, wherein the second blocking MOSFET is configured to a 5V buck converter.

### Claim 7 (depends on 1)

The computer-implementable method of claim 1, wherein the PSA is a 130 W (USB) type C PSA with two power converters.

### Claim 8

A system comprising:
a processor;
a data bus coupled to the processor; and
a non-transitory, computer-readable storage medium embodying computer program code, the non-transitory, computer-readable storage medium being coupled to the data bus, the computer program code interacting with a plurality of computer operations for compliance testing of a power supply adapter (PSA) to a powered device (PD) comprising and comprising instructions executable by the processor and configured for:
measuring a voltage at synchronous rectifier (SR) gate of the PSA, where the SR gate receives current from a main converter of the PSA;
measuring a sense current at a sense resistor wherein the sense current follows from the SR gate;
calculating a sense voltage based on the measured sense current and value of sense resistor;
if sense voltage is zero, bypassing received current of the PSA at a first blocking MOSFET, and using a second blocking MOSFET for over voltage protection and passing the received current to an output of the PSA; and
if the sense voltage is not zero, passing the received current through the first blocking MOSFET.

### Claim 9 (depends on 8)

The system of claim 8, wherein a LPS detection circuit monitors the voltage at the SR gate.

### Claim 10 (depends on 8)

The system of claim 8, wherein a PD controller performs the measuring of the sense current.

### Claim 11 (depends on 8)

The system of claim 8, wherein a PD integrated circuit (IC) detects loading of the sense current, wherein loading condition determines if PSA remains operational.

### Claim 12 (depends on 8)

The system of claim 8, wherein a PD integrated circuit (IC) sets a threshold point as to load of the PSA.

### Claim 13 (depends on 8)

The system of claim 8, wherein the second blocking MOSFET is configured to a 5V buck converter.

### Claim 14 (depends on 8)

The system of claim 8, wherein the PSA is a 130 W (USB) type C PSA with two power converters.

### Claim 15

A power supply adapter (PSA) configured to supply power to a powered device (PD) comprising:
a synchronous rectifier (SR) gate of the PSA, where the SR gate receives current from a main converter of the PSA, wherein voltage of the SR gate is measured;
a sense resistor receiving sense current at a sense resistor which follows from the SR gate, wherein a sense voltage is calculated based measure sense current and value of the sense resistor;
a first blocking MOSFET, wherein if sense voltage is zero, by passing received current of the PSA at the first blocking MOSFET; and
a second blocking MOSFET for over voltage protection when the first blocking MOSFET is bypassed, and if the sense voltage is not zero, passing the received current through the first blocking MOSFET.

### Claim 16 (depends on 15)

The PSA of claim 15 further comprising a LPS detection circuit monitors the voltage at the SR gate.

### Claim 17 (depends on 15)

The PSA of claim 15 further comprising a PD controller that performs the measuring of the sense current.

### Claim 18 (depends on 15)

The PSA of claim 15 further comprising a PD integrated circuit (IC) detects loading of the sense current, wherein loading condition determines if PSA remains operational.

### Claim 19 (depends on 15)

The PSA of claim 15 further comprising a PD integrated circuit (IC) that sets a threshold point as to load of the PSA.

### Claim 20 (depends on 15)

The PSA of claim 15, wherein the PSA is a 130 W (USB) type C PSA with two power converters.