# US 12,224,356 B2 · Thin film transistor and manufacturing method of same, and display device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,224,356 B2
- Document ID: US12224356B2
- Status: Granted
- Kind: B2
- Application number: 17/614,914
- Filed: 2019-06-04
- Published: 2022-07-28
- Granted: 2025-02-11
- Earliest claimed: 2019-06-04
- Assignees: Sakai Display Products Corporation
- Applicants: Sakai Display Products Corporation
- Inventors: Hiroyuki Ohta
- Web page: https://patentgrep.com/patent/US12224356B2

## CPC

- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/814: {Quantum box structures}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/751: {having composition variations in the channel regions}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A thin film transistor 101 includes: an active layer 7 that is supported on a substrate 1 and includes a first region 7S, a second region 7D and a channel region 7C located between the first region and the second region; a gate electrode 11 that is arranged so as to overlap with at least the channel region of the active layer 7 with a gate insulating layer 9 therebetween; a source electrode 15s electrically connected to the first region 7S; and a drain electrode 15d electrically connected to the second region 7D, at least the channel region 7C of the active layer 7 having a layered structure that includes a first metal layer m1 arranged on a lower oxide semiconductor layer 71 and containing substantially no oxygen, and an upper oxide semiconductor layer 72 arranged on the first metal layer m1, wherein a thickness of the first metal layer m1 is smaller than a thickness of the lower oxide semiconductor layer 71 or the upper oxide semiconductor 72.

## Claims

### Claim 1

A thin film transistor comprising:
a substrate;
an active layer supported on the substrate, the active layer including a first region, a second region, and a channel region located between the first region and the second region;
a gate electrode arranged so as to overlap at least the channel region of the active layer with a gate insulating layer therebetween;
a source electrode electrically connected to the first region of the active layer; and
a drain electrode electrically connected to the second region of the active layer, wherein
at least the channel region having a layered structure includes:
a lower oxide semiconductor layer;
a first metal layer that is continuous, and that is arranged on the lower oxide semiconductor layer and containing substantially no oxygen; and
an upper oxide semiconductor layer arranged on a top surface of the first metal layer, and
a thickness of the first metal layer is smaller than a thickness of the lower oxide semiconductor layer or a thickness of the upper oxide semiconductor layer.

### Claim 2 (depends on 1)

The thin film transistor according to claim 1, wherein the lower oxide semiconductor layer, the upper oxide semiconductor layer, and the first metal layer include at least one common metal element.

### Claim 3 (depends on 1)

The thin film transistor according to claim 1, wherein at least one of the lower oxide semiconductor layer and the upper oxide semiconductor layer includes an i-type semiconductor layer containing substantially no n-type impurity.

### Claim 4 (depends on 1)

The thin film transistor according to claim 1, wherein at least one of the lower oxide semiconductor layer and the upper oxide semiconductor layer includes:
an i-type semiconductor layer containing substantially no n-type impurity; and
an impurity-containing semiconductor layer, arranged between the i-type semiconductor layer and the first metal layer, containing an n-type impurity.

### Claim 5 (depends on 1)

The thin film transistor according to claim 1, wherein at least one of the lower oxide semiconductor layer and the upper oxide semiconductor layer contains an n-type impurity, and
an n-type impurity concentration profile, in a thickness direction of the at least one of the lower oxide semiconductor layer and the upper oxide semiconductor layer, includes a gradient region, where a concentration decreases, away from the first metal layer.

### Claim 6 (depends on 1)

The thin film transistor according to claim 1, wherein an oxygen concentration profile, in a thickness direction of at least one of the lower oxide semiconductor layer and the upper oxide semiconductor layer, includes a gradient region, where the concentration increases, away from the first metal layer.

### Claim 7 (depends on 1)

The thin film transistor according to claim 1, wherein:
the layered structure further includes at least one other metal layer between the lower oxide semiconductor layer and the first metal layer,
the first metal layer and the at least one other metal layer are stacked on each other with a middle oxide semiconductor layer therebetween, and
a thickness of the at least one other metal layer is smaller than the thickness of the lower oxide semiconductor layer or the thickness of the upper oxide semiconductor layer.

### Claim 8 (depends on 1)

The thin film transistor according to claim 1, wherein:
the active layer is arranged between the substrate and the gate electrode,
the gate electrode overlaps with the channel region of the active layer and does not overlap with the first region and the second region, as viewed from a direction normal to the substrate, and
upper surfaces of the first region and the second region include low-resistance oxide semiconductor regions, the low-resistance oxide semiconductor regions having a lower specific resistance than an upper surface of the channel region.

### Claim 9 (depends on 8)

The thin film transistor according to claim 8, further comprising:
an upper insulating layer that covers the active layer, the gate insulating layer, and the gate electrode, wherein
the source electrode is electrically connected to the low-resistance oxide semiconductor region of the first region in a first opening formed in the upper insulating layer, and
the drain electrode is electrically connected to the low-resistance oxide semiconductor region of the second region in a second opening formed in the upper insulating layer.

### Claim 10 (depends on 8)

The thin film transistor according to claim 8, wherein:
the active layer further includes:
a lower layer that includes at least a portion of the lower oxide semiconductor layer, and
an upper layer that is arranged on a portion of the lower layer and that includes the upper oxide semiconductor layer and the first metal layer,
the channel region includes the upper layer and the lower layer, and
each of the first region and the second region includes the lower layer and does not include the upper layer.

### Claim 11 (depends on 10)

The thin film transistor according to claim 10, wherein perimeters of the gate electrode, the gate insulating layer, and the upper layer of the active layer are aligned with each other, as viewed from the direction normal to the substrate.

### Claim 12 (depends on 8)

The thin film transistor according to claim 8, wherein the thickness of the upper oxide semiconductor layer is greater than the thickness of the lower oxide semiconductor layer.

### Claim 13 (depends on 1)

The thin film transistor according to claim 1, wherein the first metal layer contains a plurality of metal elements.

### Claim 14 (depends on 13)

The thin film transistor according to claim 13, wherein each of the lower oxide semiconductor layer, the upper oxide semiconductor layer, and the first metal layer contains In, Ga, and Zn.

### Claim 15 (depends on 1)

A display device comprising:
a thin film transistor according to claim 1;
a display area including a plurality of pixels; and
pixel circuits arranged so as to correspond, respectively, to the plurality of pixels,
wherein each of the pixel circuits includes the thin film transistor.

### Claim 16 (depends on 15)

The display device according to claim 15, further including current-driven light-emitting elements arranged so as to correspond, respectively, to the plurality of pixels, wherein
the pixel circuits drive the current-driven light-emitting elements.